Fri Apr 28 14:08:28 2017
options
author
window_size
category
[GRC Hier Blocks]
comment
description
_enabled
True
_coordinate
(8, 8)
_rotation
0
generate_options
qt_gui
hier_block_src_path
.:
id
top_block
max_nouts
0
qt_qss_theme
realtime_scheduling
run_command
{python} -u {filename}
run_options
prompt
run
True
thread_safe_setters
title
variable
comment
_enabled
True
_coordinate
(8, 100)
_rotation
0
id
fc
value
499e6
variable
comment
_enabled
True
_coordinate
(8, 160)
_rotation
0
id
fs
value
500e3
variable
comment
_enabled
True
_coordinate
(8, 284)
_rotation
0
id
gain
value
40
variable
comment
_enabled
True
_coordinate
(8, 220)
_rotation
0
id
lo_offset
value
571179
osmosdr_source
alias
ant0
TX/RX
bb_gain0
0
bw0
fs
dc_offset_mode0
0
corr0
0
freq0
fc
gain_mode0
False
if_gain0
0
iq_balance_mode0
0
gain0
gain
ant10
bb_gain10
20
bw10
0
dc_offset_mode10
0
corr10
0
freq10
100e6
gain_mode10
False
if_gain10
20
iq_balance_mode10
0
gain10
10
ant11
bb_gain11
20
bw11
0
dc_offset_mode11
0
corr11
0
freq11
100e6
gain_mode11
False
if_gain11
20
iq_balance_mode11
0
gain11
10
ant12
bb_gain12
20
bw12
0
dc_offset_mode12
0
corr12
0
freq12
100e6
gain_mode12
False
if_gain12
20
iq_balance_mode12
0
gain12
10
ant13
bb_gain13
20
bw13
0
dc_offset_mode13
0
corr13
0
freq13
100e6
gain_mode13
False
if_gain13
20
iq_balance_mode13
0
gain13
10
ant14
bb_gain14
20
bw14
0
dc_offset_mode14
0
corr14
0
freq14
100e6
gain_mode14
False
if_gain14
20
iq_balance_mode14
0
gain14
10
ant15
bb_gain15
20
bw15
0
dc_offset_mode15
0
corr15
0
freq15
100e6
gain_mode15
False
if_gain15
20
iq_balance_mode15
0
gain15
10
ant16
bb_gain16
20
bw16
0
dc_offset_mode16
0
corr16
0
freq16
100e6
gain_mode16
False
if_gain16
20
iq_balance_mode16
0
gain16
10
ant17
bb_gain17
20
bw17
0
dc_offset_mode17
0
corr17
0
freq17
100e6
gain_mode17
False
if_gain17
20
iq_balance_mode17
0
gain17
10
ant18
bb_gain18
20
bw18
0
dc_offset_mode18
0
corr18
0
freq18
100e6
gain_mode18
False
if_gain18
20
iq_balance_mode18
0
gain18
10
ant19
bb_gain19
20
bw19
0
dc_offset_mode19
0
corr19
0
freq19
100e6
gain_mode19
False
if_gain19
20
iq_balance_mode19
0
gain19
10
ant1
bb_gain1
20
bw1
0
dc_offset_mode1
0
corr1
0
freq1
100e6
gain_mode1
False
if_gain1
20
iq_balance_mode1
0
gain1
10
ant20
bb_gain20
20
bw20
0
dc_offset_mode20
0
corr20
0
freq20
100e6
gain_mode20
False
if_gain20
20
iq_balance_mode20
0
gain20
10
ant21
bb_gain21
20
bw21
0
dc_offset_mode21
0
corr21
0
freq21
100e6
gain_mode21
False
if_gain21
20
iq_balance_mode21
0
gain21
10
ant22
bb_gain22
20
bw22
0
dc_offset_mode22
0
corr22
0
freq22
100e6
gain_mode22
False
if_gain22
20
iq_balance_mode22
0
gain22
10
ant23
bb_gain23
20
bw23
0
dc_offset_mode23
0
corr23
0
freq23
100e6
gain_mode23
False
if_gain23
20
iq_balance_mode23
0
gain23
10
ant24
bb_gain24
20
bw24
0
dc_offset_mode24
0
corr24
0
freq24
100e6
gain_mode24
False
if_gain24
20
iq_balance_mode24
0
gain24
10
ant25
bb_gain25
20
bw25
0
dc_offset_mode25
0
corr25
0
freq25
100e6
gain_mode25
False
if_gain25
20
iq_balance_mode25
0
gain25
10
ant26
bb_gain26
20
bw26
0
dc_offset_mode26
0
corr26
0
freq26
100e6
gain_mode26
False
if_gain26
20
iq_balance_mode26
0
gain26
10
ant27
bb_gain27
20
bw27
0
dc_offset_mode27
0
corr27
0
freq27
100e6
gain_mode27
False
if_gain27
20
iq_balance_mode27
0
gain27
10
ant28
bb_gain28
20
bw28
0
dc_offset_mode28
0
corr28
0
freq28
100e6
gain_mode28
False
if_gain28
20
iq_balance_mode28
0
gain28
10
ant29
bb_gain29
20
bw29
0
dc_offset_mode29
0
corr29
0
freq29
100e6
gain_mode29
False
if_gain29
20
iq_balance_mode29
0
gain29
10
ant2
bb_gain2
20
bw2
0
dc_offset_mode2
0
corr2
0
freq2
100e6
gain_mode2
False
if_gain2
20
iq_balance_mode2
0
gain2
10
ant30
bb_gain30
20
bw30
0
dc_offset_mode30
0
corr30
0
freq30
100e6
gain_mode30
False
if_gain30
20
iq_balance_mode30
0
gain30
10
ant31
bb_gain31
20
bw31
0
dc_offset_mode31
0
corr31
0
freq31
100e6
gain_mode31
False
if_gain31
20
iq_balance_mode31
0
gain31
10
ant3
bb_gain3
20
bw3
0
dc_offset_mode3
0
corr3
0
freq3
100e6
gain_mode3
False
if_gain3
20
iq_balance_mode3
0
gain3
10
ant4
bb_gain4
20
bw4
0
dc_offset_mode4
0
corr4
0
freq4
100e6
gain_mode4
False
if_gain4
20
iq_balance_mode4
0
gain4
10
ant5
bb_gain5
20
bw5
0
dc_offset_mode5
0
corr5
0
freq5
100e6
gain_mode5
False
if_gain5
20
iq_balance_mode5
0
gain5
10
ant6
bb_gain6
20
bw6
0
dc_offset_mode6
0
corr6
0
freq6
100e6
gain_mode6
False
if_gain6
20
iq_balance_mode6
0
gain6
10
ant7
bb_gain7
20
bw7
0
dc_offset_mode7
0
corr7
0
freq7
100e6
gain_mode7
False
if_gain7
20
iq_balance_mode7
0
gain7
10
ant8
bb_gain8
20
bw8
0
dc_offset_mode8
0
corr8
0
freq8
100e6
gain_mode8
False
if_gain8
20
iq_balance_mode8
0
gain8
10
ant9
bb_gain9
20
bw9
0
dc_offset_mode9
0
corr9
0
freq9
100e6
gain_mode9
False
if_gain9
20
iq_balance_mode9
0
gain9
10
comment
affinity
args
name=MyB210,product=B210,serial=30BC5CB,type=b200,lo_offset=571179,uhd
_enabled
1
_coordinate
(184, 184)
_rotation
0
id
osmosdr_source_0
maxoutbuf
0
clock_source0
time_source0
clock_source1
time_source1
clock_source2
time_source2
clock_source3
time_source3
clock_source4
time_source4
clock_source5
time_source5
clock_source6
time_source6
clock_source7
time_source7
minoutbuf
0
nchan
1
num_mboards
1
type
fc32
sample_rate
fs
sync
qtgui_freq_sink_x
autoscale
False
average
1.0
axislabels
True
bw
fs
alias
fc
fc
comment
ctrlpanel
False
affinity
_enabled
True
fftsize
1024*8
_coordinate
(512, 172)
gui_hint
_rotation
0
grid
False
id
qtgui_freq_sink_x_0
legend
True
alpha1
1.0
color1
"blue"
label1
width1
1
alpha10
1.0
color10
"dark blue"
label10
width10
1
alpha2
1.0
color2
"red"
label2
width2
1
alpha3
1.0
color3
"green"
label3
width3
1
alpha4
1.0
color4
"black"
label4
width4
1
alpha5
1.0
color5
"cyan"
label5
width5
1
alpha6
1.0
color6
"magenta"
label6
width6
1
alpha7
1.0
color7
"yellow"
label7
width7
1
alpha8
1.0
color8
"dark red"
label8
width8
1
alpha9
1.0
color9
"dark green"
label9
width9
1
maxoutbuf
0
minoutbuf
0
name
""
nconnections
1
showports
True
freqhalf
True
tr_chan
0
tr_level
0.0
tr_mode
qtgui.TRIG_MODE_FREE
tr_tag
""
type
complex
update_time
0.001
wintype
firdes.WIN_BLACKMAN_hARRIS
label
Relative Gain
ymax
10
ymin
-140
units
dB
uhd_usrp_source
alias
ant0
TX/RX
bw0
0
center_freq0
uhd.tune_request(fc, lo_offset)
dc_offs_enb0
""
iq_imbal_enb0
""
norm_gain0
False
gain0
gain
lo_export0
False
lo_source0
internal
ant10
bw10
0
center_freq10
0
dc_offs_enb10
""
iq_imbal_enb10
""
norm_gain10
False
gain10
0
lo_export10
False
lo_source10
internal
ant11
bw11
0
center_freq11
0
dc_offs_enb11
""
iq_imbal_enb11
""
norm_gain11
False
gain11
0
lo_export11
False
lo_source11
internal
ant12
bw12
0
center_freq12
0
dc_offs_enb12
""
iq_imbal_enb12
""
norm_gain12
False
gain12
0
lo_export12
False
lo_source12
internal
ant13
bw13
0
center_freq13
0
dc_offs_enb13
""
iq_imbal_enb13
""
norm_gain13
False
gain13
0
lo_export13
False
lo_source13
internal
ant14
bw14
0
center_freq14
0
dc_offs_enb14
""
iq_imbal_enb14
""
norm_gain14
False
gain14
0
lo_export14
False
lo_source14
internal
ant15
bw15
0
center_freq15
0
dc_offs_enb15
""
iq_imbal_enb15
""
norm_gain15
False
gain15
0
lo_export15
False
lo_source15
internal
ant16
bw16
0
center_freq16
0
dc_offs_enb16
""
iq_imbal_enb16
""
norm_gain16
False
gain16
0
lo_export16
False
lo_source16
internal
ant17
bw17
0
center_freq17
0
dc_offs_enb17
""
iq_imbal_enb17
""
norm_gain17
False
gain17
0
lo_export17
False
lo_source17
internal
ant18
bw18
0
center_freq18
0
dc_offs_enb18
""
iq_imbal_enb18
""
norm_gain18
False
gain18
0
lo_export18
False
lo_source18
internal
ant19
bw19
0
center_freq19
0
dc_offs_enb19
""
iq_imbal_enb19
""
norm_gain19
False
gain19
0
lo_export19
False
lo_source19
internal
ant1
bw1
0
center_freq1
0
dc_offs_enb1
""
iq_imbal_enb1
""
norm_gain1
False
gain1
0
lo_export1
False
lo_source1
internal
ant20
bw20
0
center_freq20
0
dc_offs_enb20
""
iq_imbal_enb20
""
norm_gain20
False
gain20
0
lo_export20
False
lo_source20
internal
ant21
bw21
0
center_freq21
0
dc_offs_enb21
""
iq_imbal_enb21
""
norm_gain21
False
gain21
0
lo_export21
False
lo_source21
internal
ant22
bw22
0
center_freq22
0
dc_offs_enb22
""
iq_imbal_enb22
""
norm_gain22
False
gain22
0
lo_export22
False
lo_source22
internal
ant23
bw23
0
center_freq23
0
dc_offs_enb23
""
iq_imbal_enb23
""
norm_gain23
False
gain23
0
lo_export23
False
lo_source23
internal
ant24
bw24
0
center_freq24
0
dc_offs_enb24
""
iq_imbal_enb24
""
norm_gain24
False
gain24
0
lo_export24
False
lo_source24
internal
ant25
bw25
0
center_freq25
0
dc_offs_enb25
""
iq_imbal_enb25
""
norm_gain25
False
gain25
0
lo_export25
False
lo_source25
internal
ant26
bw26
0
center_freq26
0
dc_offs_enb26
""
iq_imbal_enb26
""
norm_gain26
False
gain26
0
lo_export26
False
lo_source26
internal
ant27
bw27
0
center_freq27
0
dc_offs_enb27
""
iq_imbal_enb27
""
norm_gain27
False
gain27
0
lo_export27
False
lo_source27
internal
ant28
bw28
0
center_freq28
0
dc_offs_enb28
""
iq_imbal_enb28
""
norm_gain28
False
gain28
0
lo_export28
False
lo_source28
internal
ant29
bw29
0
center_freq29
0
dc_offs_enb29
""
iq_imbal_enb29
""
norm_gain29
False
gain29
0
lo_export29
False
lo_source29
internal
ant2
bw2
0
center_freq2
0
dc_offs_enb2
""
iq_imbal_enb2
""
norm_gain2
False
gain2
0
lo_export2
False
lo_source2
internal
ant30
bw30
0
center_freq30
0
dc_offs_enb30
""
iq_imbal_enb30
""
norm_gain30
False
gain30
0
lo_export30
False
lo_source30
internal
ant31
bw31
0
center_freq31
0
dc_offs_enb31
""
iq_imbal_enb31
""
norm_gain31
False
gain31
0
lo_export31
False
lo_source31
internal
ant3
bw3
0
center_freq3
0
dc_offs_enb3
""
iq_imbal_enb3
""
norm_gain3
False
gain3
0
lo_export3
False
lo_source3
internal
ant4
bw4
0
center_freq4
0
dc_offs_enb4
""
iq_imbal_enb4
""
norm_gain4
False
gain4
0
lo_export4
False
lo_source4
internal
ant5
bw5
0
center_freq5
0
dc_offs_enb5
""
iq_imbal_enb5
""
norm_gain5
False
gain5
0
lo_export5
False
lo_source5
internal
ant6
bw6
0
center_freq6
0
dc_offs_enb6
""
iq_imbal_enb6
""
norm_gain6
False
gain6
0
lo_export6
False
lo_source6
internal
ant7
bw7
0
center_freq7
0
dc_offs_enb7
""
iq_imbal_enb7
""
norm_gain7
False
gain7
0
lo_export7
False
lo_source7
internal
ant8
bw8
0
center_freq8
0
dc_offs_enb8
""
iq_imbal_enb8
""
norm_gain8
False
gain8
0
lo_export8
False
lo_source8
internal
ant9
bw9
0
center_freq9
0
dc_offs_enb9
""
iq_imbal_enb9
""
norm_gain9
False
gain9
0
lo_export9
False
lo_source9
internal
clock_rate
0.0
comment
affinity
dev_addr
""
dev_args
""
_enabled
0
_coordinate
(200, 92)
_rotation
0
id
uhd_usrp_source_0
maxoutbuf
0
clock_source0
sd_spec0
time_source0
clock_source1
sd_spec1
time_source1
clock_source2
sd_spec2
time_source2
clock_source3
sd_spec3
time_source3
clock_source4
sd_spec4
time_source4
clock_source5
sd_spec5
time_source5
clock_source6
sd_spec6
time_source6
clock_source7
sd_spec7
time_source7
minoutbuf
0
nchan
1
num_mboards
1
type
fc32
samp_rate
fs
hide_cmd_port
False
hide_lo_controls
True
stream_args
stream_chans
[]
sync
otw
osmosdr_source_0
qtgui_freq_sink_x_0
0
0
uhd_usrp_source_0
qtgui_freq_sink_x_0
0
0