Feature #1706: Hardware / Circuit board update for SAM3S based SIMtrace2 with 1.8V/5V support
do proper re-layout of the board
SIMtrace v1 PCB layout has been serving us well, but is far from ideal in terms of RF return paths and signal integrity.
Let's revisit that when doing a v2 of the hardware
- Assignee changed from tsaitgaist to laforge
add enough space to place a boxed IDC 20-pin male header for the JTAG connection.
currently the ERASE pin is in the way.
alternatively switch to a smaller SWD header.
- Assignee deleted (
A small SWD header on the edge of the board would be a nice addition.
- Target version set to PCB v2
- Status changed from New to In Progress
- Status changed from In Progress to Stalled
- Priority changed from Normal to Low
- Related to Bug #4118: VCC_PHONE strong pull on SIMtrace board added
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