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Feature #3237

closed

Come up with GPS-DO design for E1 Interface

Added by laforge over 3 years ago. Updated over 1 year ago.

Status:
Rejected
Priority:
Normal
Assignee:
Category:
-
Target version:
-
Start date:
05/04/2018
Due date:
% Done:

0%

Spec Reference:
Tags:
E1

Description

We want to include a GPS-DO in our design, to ensure operation of the BTS at proper carrier frequency. That GPS-DO should have
  • some GPS receiver with 1PPS output
  • some local, voltage-controlled oscillator (VCTCXO)
    • the frequency should permit simple division to generate the 2.048 MHz required for E1 (otherwise we'd need a PLL)
  • some DAC to steer the voltage-controlled oscillator
  • some circuitry to count the number of of oscillator cycles between 1PPS edges
  • some software to compensate for 1PPS jitter, loop filtering, possibly temperature compensation, etc.

See E1_Clock_Notes for more information.


Files

sam4s_clock_pll_scheme.pdf View sam4s_clock_pll_scheme.pdf 227 KB vogelchr, 05/22/2018 05:17 PM
sam4s_clock_pll_scheme.svg View sam4s_clock_pll_scheme.svg 111 KB vogelchr, 05/22/2018 05:21 PM

Related issues

Related to E1/T1 Hardware Interface (including icE1usb) - Feature #2484: Architecture of USB E1/T1/J1 adapterResolvedlaforge09/02/2017

Actions
Related to E1/T1 Hardware Interface (including icE1usb) - Feature #3272: next-generation osmo-e1-xcvr boardRejectedvogelchr05/15/2018

Actions
Related to E1/T1 Hardware Interface (including icE1usb) - Feature #3967: design a custom board for the ICE40 E1 adapterResolvedtnt04/30/2019

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