design simple SFP breakout board
- SFP cage + connector
- 4x SMA for RD+/RD-/TD+/TD-
- 2.54mm header for accessing I2C of SFP
- 2.54mm header with all the misc signals (LOS, etc.)
- power supply (5V input, DC/DC to 3.3V, 300mA max, filtering as per SFP MSA)
Basically we want the inverse of https://shop.trenz-electronic.de/en/TE0422-02-SFP-2-SMA-Adapter
There seems to be a board close to what we want, but USD 495 is ridiculous for something that has a parts cost of USD 30: https://hitechglobal.us/index.php?route=product/product&path=59_90&product_id=124
The resulting design should be something small which we can easily hand to prototype manufacturers. Staying within 10x10cm might be a good idea, if possible.In terms of the SFP connector and cage, I would suggest to use
both are relatively low cost and available in quantity from stock.
- SFP part footprints library
- board layout
#7 Updated by mschramm almost 3 years ago
- % Done changed from 0 to 50
A simple PCB has been committed, derived mainly from SFP exoperimenter PCB (see #3313).
Remarks see ticket #3313, some apply here too. - The break in the GND plane under the diff signals of the SFP receptacle is not nice and should be improved on both PCB - if we don't go to a 4-layer PCB (and remain w/ 1.55mm FR4) for a 'closer' GND plane.
#8 Updated by laforge almost 3 years ago
13:25 < tnt> Any "real" design using the SFP would be 4 layer, so I guess it's an argument to make the experimentation board as close to what a final product would use.
so let's go four-layer. mschramm: please change layer stack-up, add gnd/vcc planes, and adjust trace widths for "usual" four-layer stacking.
#9 Updated by laforge almost 3 years ago
let's please also add some form of polarity protection to the DC input. A regular series diode would be the simplest approach, but the TLV1117 requires up to 1.4V drop-out voltage, which makes the budget for 0.7V quite tight. (3.3+1.4=4.7V). Even a shottky diode is unrealistic at that point.
So either we use a different approach for polarity protection, or a different voltage regulator with lower drop-out voltage. Moving away from nominal 5V DC as input voltage is not really a good idea, IMHO.
There are LDOs with built-in reverse polarity protection. However, we cannot use electrolytic caps at the input (C3) in this case. But 10uF at 5V is definitely possible to get as ceramic?
#13 Updated by laforge almost 3 years ago
for the record: EAGLE designs are in http://git.osmocom.org/osmo-small-hardware/tree/sfp-breakout
#14 Updated by mschramm over 2 years ago
- Status changed from In Progress to Feedback
- % Done changed from 50 to 80
#16 Updated by laforge over 2 years ago
- Status changed from Feedback to Resolved
- % Done changed from 90 to 100
Thanks. I extended the default clearance from 0.15mm (was looking quite small in getbv) to 0.25mm, re-ran the DRC and now ordered 10 boards from Seeed.
The clearance change + exported gerber has been committed.
#19 Updated by laforge over 2 years ago
The boards that I have don't have the 3v3 connected on the bottom pin header.
Yes, I'm sorry, that's indeed a known bug :/
Eagle schematic and board file look fine, but the gerbers are not ...
See "git log", the error was fixed after the gerber/boards were made/tested.