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Feature #3858

closed

Make more GPIOs avaliable for future use

Added by horiz0n over 3 years ago. Updated over 3 years ago.

Status:
Resolved
Priority:
Normal
Assignee:
Target version:
Start date:
03/25/2019
Due date:
03/25/2019
% Done:

100%

Spec Reference:

Description

Could you please wire some free pins and append/align them to the end of the olimex expansion connector so they could be used as additional spi chip selects?


Related issues

Follows osmo-clock-gen - Bug #3857: Use SAMD XOSC / PLL / GCLK to allow lower reference frequenciesResolvedmschramm03/24/2019

Actions
Actions #1

Updated by laforge over 3 years ago

  • Assignee set to laforge
  • Target version set to hw-v2
Actions #2

Updated by laforge over 3 years ago

  • Assignee changed from laforge to mschramm
Actions #3

Updated by mschramm over 3 years ago

  • Due date set to 03/25/2019
  • Start date changed from 03/24/2019 to 03/25/2019
  • Follows Bug #3857: Use SAMD XOSC / PLL / GCLK to allow lower reference frequencies added
Actions #4

Updated by mschramm over 3 years ago

  • Status changed from New to In Progress
Actions #5

Updated by mschramm over 3 years ago

  • Status changed from In Progress to Resolved
  • % Done changed from 0 to 100

allocated PA11, PA14 and PA15 as additional GPIOs on a pinheader (together with VDD and GND).

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