Atmel SAM Approach

This page describes a proposed approach of implementing the E1 adapter using osmo-e1-xcvr and an Atmel SAMx microcontroller, suhc as a SAM3S or SAM4S.


  • the SAM controls the LIU via SPI
  • the SAM attaches to the host via USB
  • The SAM SSC Peripheral is used to interface to the receive + transmit bit-streams of the LIU
  • The SAM3 TC Peripheral is used for Rx frame alignment


  • SSC can receive/transmit synchronous serial bit streams with external or internal clock
  • SSC supports DMA operation between the (de)serializer and RAM using PDC (peripheral DMA controller)
  • SSC can run either
    • continously (frame alignment done in software [possibly using bit-banding], as no octet alignment of frames), or
    • triggered by RF input, which we supply from SSC (see below) with hardware-assisted frame alignment

Frame Alignment using TC (Timer/Counter)

The idea is to use one of the TC units to perform hardware-assisted frame alignment and this way prevent us from having to do tons of bit-shifting in software in order to align the start of the 256 bit E1 frame with an octet boundary.

  • received clock is fed into TCLKx
  • internal 16-bit counter is set to count up to 256 (one frame duration)
  • TC is operated in WAVEFORM mode
  • TIOA or TIOB are operated as output routed to the SSC RF (receive frame) input
  • Ra/Rb/Rc registers are used to shift the rising and falling edge of the TIOA/TIOB signal within the 256bit frame

Transmit side

The transmit side is rather simple:
  • use either recovered Rx clock or locally-generated clock (from GPS-DO)
  • serialize the bits with no particular alignment requirements, as it's entirely up to the receiver to align to the frames we send

Eval boards

We need access to PA16 (TK), PA17 (TD), PA18 (RD), PA19 (RK).

    • exposes SSC I/O (stated above) signals on external headers
    • contains built-in JTAG/SWD debugger for development + flashing
    • exposes SPI on external header (control of osmo-e1-xcvr)
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