E1 Interface Blocks

An E1 interface is typically split into a couple of different blocks

This is a high-level overview of the functional blocks of a classic E1/T1 adapter, such as a E1 card supported by mISDN, DAHDI, ...:

Transformer / Magnetics

The transformer perfrorms galvanic isolation between the wires of the line/cable and the E1 interface circuit. Think of Ethernet, which follows the exact same principle.

Line Interface Unit (LIU)

The LIU sits between the E1 controller and the magnetics

The LIU is responsible for
  • converting the received ternary HDB3 encoding into a stream of binary bits
  • converting to-be-transmitted binary bits into ternary HDB3 encoding

Sometimes, further functionality such as clock recovery, loopback, jitter attenuator, ... are built into the LIU.


An example for a very simple LIU is the Exar XRT59L91. It only contains
  • Rx: receive equalizer, peak detector, LOS detector
  • Tx: pulse shaping, output drivers

It doesn't even do any HDB3 encoding/decoding or clock recovery


An example for a medium complexity LIU is the Exar XRT82D20. It contains
  • transmit side
    • HDB3 encoder
    • Tx pulse shaper for both 75 Ohms coax and 120 Ohms twisted pair
    • line driver
  • receiver side
    • peak detector, data slicer, LOS detect (to digital output)
    • data + timing recovery
    • hdb3 decoder
  • digital, local and remote loopback capability

Compared to the XRT59L91, the significant addition is the HDB3 en/decoders and the timing recovery.


An example for an even more higher end LIU is the IDT82V2081. compared to the XRT82D20, it contains
  • adaptive internal termination for rx and tx
  • adaptive equalizer on receive side
  • PRBS detector / generator
  • ILBC detector / generator
  • not only E1, but also T1 + J1 compatibility
  • SPI or parallel bus control interface

We're using the IDT82V2081 in the osmo-e1-xcvr evaluation board.

Another example in this category is the Dallas/Maxim DS21348

E1 Controller "framer"

The E1 controller is what implements
  • frame (and multiframe) alignment
  • CRC4 generation/verification
  • HDLC processors for the individual timeslots
  • interface with the host computer
Examples for such controllers are
  • Siemens/Infineon FALC/DualFALCQuadFALC/OctalFALC, LIU + Framer + HDLC + parallel bus interface)
    • used in many BTS/telecom equipment, but also in Digium E1/T1 cards
    • obsolete/EOL
  • CologneChip HFC-E1 (LIU + Framer + HDLC + DMA engine with PCI bus interface)
    • used in PCI cards we used for original OpenBSC development with Siemens BS-11 BTS
    • supported by mISDN
  • Exar XRT86VL30 (LIU + Framer + HDLC + DMA engine with intel/motorola parallel bus)
  • Dallas/Maxim DS26521 (SPI or parallel bus, TDM Backplane)
Files (2)
xrt82d20_v108_082806.pdf View xrt82d20_v108_082806.pdf 411 KB XRT82D20 data sheet laforge, 05/04/2018 08:11 PM
82V2081_DS.pdf View 82V2081_DS.pdf 843 KB IDT82V2081 data sheet laforge, 05/04/2018 08:26 PM

Updated by laforge about 4 years ago · 4 revisions

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