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IcE1usb » History » Version 15

laforge, 11/16/2020 10:39 PM
toc + sysmocom availability

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h1. iCE40 E1 USB interface
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{{>toc}}
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This page is the main entry point for the (completed!) "Software defined" E1 USB interface using the iCE40 FPGA at its core.
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h2. Architecture
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This approach tries to implement as much as possible inside an iCE40 FPGA
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Particularly, the iCE40 FPGA
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* contains the E1 PHY. There is no external LIU*, reducing the BOM cost significantly.  Instead, the comparators of the FPGA are used to detect RX positive / negative pulses and normal CMOS drivers to generate the TX pulses.  In practice, this has shown to work reliably on short E1 links of a few meters.  We'd expect some problems in terms of long-haul E1 links, but those are not really the target use case here.
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* contains the E1 framer, including frame alignment, CRC4 verification/generation, ...
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* contains a USB softcore (no external USB PHY needed)
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* contains a PicoRV32 softcore to implement USB protocol handling and to connect the E1 softcore with the USB softcore
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So all-in-all, we can build a USB-E1 interface from little more than an iCE40 FPGA and an E1 line transformer!
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{{graphviz_link()
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digraph G {
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  rankdir = LR;
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  BTS -> XFRM [label="E1"];
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  Linux [label="Linux\nOsmoBSC"];
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  subgraph cluster_A {
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    label = "iCE40 E1 USB Interface";
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    XFRM [label="Magnetics"];
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    XFRM -> Comparators [label="E1 (HDB3)"];
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    subgraph cluster_B {
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      label = "iCE40 FPGA";
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      Comparators;
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      Framer [label="E1 Framer\nSoftcore"];
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      RISCV [label="RISCV\nSoftcore"];
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      USB [label="USB\nSoftcore"];
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      Comparators -> Framer [label="E1 (Serial Bits)"];
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      Framer -> RISCV;
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      RISCV -> USB;
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    }
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  }
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  USB -> Linux [label="Frame-aligned raw\nbits over USB"];
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}
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}}
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h2. Current stack
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* The hardware for the first production version is documented in the https://git.osmocom.org/osmo-e1-hardware
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* The fpga gateware and associated embedded firmware is hosted in the same git repository. Some parts are in submodules (be sure to use recursive clone)
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* The userspace daemon that handles the USB communication is hosted at: https://git.osmocom.org/osmo-e1d
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* The support for this daemon interface to the rest of the cellular stack is merged in mainline [[libosmo-abis:]]. Make sure you build it with @--enable-e1d@, though.
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h2. Availability
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The fully assembled and tested icE1usb hardware is sold by "sysmocom":https://sysmocom.de/ ("product page":https://www.sysmocom.de/products/lab/icE1usb, "data sheet":https://www.sysmocom.de/downloads/icE1_data_sheet.pdf) an can be purchased from the "webshop":http://shop.sysmocom.de/products/icE1usb - hobbyist/community discounts are available.
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h2. Presentations
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* Talk from OsmoCon 2018 about the Software Defined E1 project as a whole : attachment:osmocon_2018_e1.pdf
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* Talk from OsmoDevCon 2019 about the iCE40 based solution specifically: attachment:osmodevcon_2019_e1.pdf
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* "video recording of the iC40 based approach / OsmoDevCon 2019":https://media.ccc.de/v/osmodevcon2019-97-software-defined-e1
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h2. Status
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h3. Hardware
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* First proof of concept was done in 2018, based on manually wired protoboard to prove viability of the USB and E1 interface.
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* Several hand-wired pre-production prototypes based on iCEbreaker and iCEbreaker-bitsy have been assembled and used successfully from late 2018 to early 2020
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* A fully integrated single-board design with two E1 lines and a GPS-DO for E1 clock stability has been created by @tnt in August 2020. After a couple of prototypes were built and tested, a first production run was made and should be available through the sysmocom shop.
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h4. Early Proof-of-Concept and Prototypes
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!{width:45%}proto_poc.jpg!
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!{width:45%}ice40-e1.jpg!
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h4. Pre-production Prototype
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!{width:50%}osmo-e1-ice40.jpg!
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h4. Rev 1.0 production
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!{width:45%}prod_pcb.jpg!
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!{width:45%}prod_batch.jpg!
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h3. Software
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The full stack from gateware through firmware and host software has been tested and used in a variety of scenarios.
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* gateware for the FPGA and firmware for the RISC-V softcore is available from https://git.osmocom.org/osmo-e1-hardware and is buildable using the icestorm OSS toolchain
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* The host software/driver is part of [[osmo-e1d:]], see the proejct page for related details.  [[libosmo-abis:]] has been extended with [[osmo-e1d:]] support.
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h2. Credits
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The development of FPGA softcores, firmware, PCB schematics, PCB layout and osmo-e1d was done by Sylvain Munaut (@tnt).
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