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Attiny-wdt » History » Revision 4

Revision 3 (laforge, 08/10/2022 10:38 AM) → Revision 4/8 (laforge, 08/10/2022 10:38 AM)

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 h1. attiny-wdt @attiny-wdt@ 

 @attiny-wdt@ is an OSHW + open source firmware project of turning an Attiny{4,5,9,10} microcontroller into a hardware watchdog that can be used to reset another CPU/SoC when it gets stuck. 

 The primary use case was to use it with Raspberry Pi devices. Those do have a built-in hardware watchdog themselves, but unfortuantelly it is not documented at the register-level and there is no option to enable it straight from the boot loader, so it is not really providing the kind of guarantees one would expect from a watchdog. 

 h2. Operating Principle 

 The general idea is to use the Timer/Counter block of the ATTiny9 in the following way: 
 * Clear the output @OC0B@ on BOTTOM (counter == 0) 
 ** this generates a rising edge on the @!RESET@ signal of the CPU we're guarding 
 * Set the output @OC0B@ when counter reaches @OCR0B@ 
 ** this generates a falling edge on the @!RESET@ signal of the CPU we're guarding 
 * Wrap the counter once it reaches @OCR0A@ 
 ** this determines the amount of time until a reset 
 * Configure any falling edge on the INT0 pin to re-set the counter to zero 
 ** this is what the software on the CPU we're guarding nees to do to avoid the watchdog from expiring 

 h2. Pinout 

 The board contains two connectors: 

 h3. JP1 

 This header is used in two cases: 
 # *programming phase:* the firmware into the ATtiny9 (using the TPI protocol) 
 # *normal use:* To supply VCC to the watchdog and to connect its output with    @!RESET/GLOBAL_EN@ of the target 

 |_.Number|_.Name|_.Description|_.Programming Function| 
 |1|VCC|3.3V supply voltage powering the watchdog|VCC| 
 |2|GLOBAL_EN|watchdog output; expected to be connected to the !RESET of the CPU we're guarding (or GLOBAL_EN in case of Raspi)|TPICLK| 
 |3|PB0|-|TPIDATA| 
 |4|!RESET|-|!RESET| 
 |5|GND|Ground|GND| 


 h3. JP2 

 |_.Number|_.Name|_.Description| 
 |1|GND|Ground| 
 |2|PB2|Input; any falling edge re-sets the counter to zero. Connected to GPIO26 on Raspi| 
 |3|PB0/GPIO19|No function; RFU| 


 h2. Pictures 

 The pictures below show one of the first hand-soldered prototypes: 

 {{thumbnail(attiny-wdt1.jpg)}} {{thumbnail(attiny-wdt2.jpg)}} {{thumbnail(attiny-wdt3.jpg)}} 
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