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Ericsson RBS2000 GPRS » History » Revision 6

Revision 5 (laforge, 10/15/2016 03:43 PM) → Revision 6/9 (laforge, 10/15/2016 03:56 PM)

h1. Ericsson RBS2000 GPRS 

 {{>toc}} 

 This page collects some information regarding Ericsson RBS2000 GPRS support. 

 The fundamental difference between what we do so far (PCU co-located with BTS) and this architecture is that the PCU is co-located with the BSC! 

 In order to have (E)GPRS support using RBS2000, we need to solve the following parts: 
 * configuration / activation of timeslots using OML2000 / RSL? 
 * ensuring that GPRS related SI, particularly SI13 are broadcast via BCCH 
 * implementation of PCU TRAU frame format and converter between osmo-pcu PHY interface and them 
 ** 16k sub-slot and 64k slot formats 
 ** associated PCU SYNC protocol 
 ** all various coding schemes 
 * paging coordination between BSC and PCU 

 h2. PDCH timeslot configuration 

 It seems that in OM2000 all TCH (/F, /H, PDCH) are configued with a Combination "8", and no differentiation is made 

 The actual activation of the channel is expected via RSL.    So it's analogous to a RSL CHAN ACT for TCH/H or TCH/F, but we also do this for a PDCH. In order to do so, we send a RSL CHAN ACT with Channel Number 0b11000 + the timeslot number.    Deactivation works the same way. 

 h2. GPRS RACH requests 

 The BSC must identify the GPRS RACH requests (similar to osmo-bts currently) and pass them into the PCU.    This could be done using the same pcu socket interface that already exists. 

 h2. GPRS paging 

 Thre's a RSL "Packet Paging Indication IE" (IEI = 0xF3) that the BSC can include when sending a paging request to the BTS. It's currently not clear what this is used for and why it is required. 

 h2. TRAU frames 

 Classic GSM TRAU frames (for circuit switched voice) are transmitted on 16kBps sub-slots and are 39 octets (312 bits) long. They thus occur every 19.5ms.    Four 16kbps sub-slots are multiplexed into a 64kbps E1 slots. For more information see 3GPP TS 48.060. 

 Ericsson also introduces 64kbps TRAU frames (for higher EGPRS coding schemes). 

 The Synchronization of TRAU frames is based on a 16-bit all-zero field at the beginning of each TRAU frame (called the T0 bits) followed by a signle 1 bit (called the T1 bit). 


 h3. 16kBps sub-slots 

 h4. PCU-DATA.ind 

 This frame can be used by a CS-1 or CS-2 frame transmitted by the PCU, i.e. downlink. 

 |T|17|T0*16,T1*1|Sync Word| 
 |C|8|C1..C8|Control Bits (Frame Type, Time adjustmentValue,Uplink Frame Error)| 
 |PC|1|PC|Parity (C1..C8)| 
 |E|16|E1..E16|Codec Control, Uplink Channel Mode, Power Control| 
 |PE|1|PE|Parity (E1..E16)| 
 |D|273|D1..D273|Data bits| 
 |TA|4|TA1..TA4|Time Alignment| 

 h4. CCU-DATA.ind 

 This frame can be used by a CS-1 or CS-2 frame transmitted by the CCU, i.e. uplink. 

 h3. 64kBps slots 

 h4. PCU-DATA-64.ind 

 |T|65|T0*64,T1*1|Sync Word| 
 |D|48|D1..D48|Data bits| 
 |C|8|C1..C8|Control Bits| 
 |PC|1|PC|Parity (C1..C8)| 
 |E|36|E1..E36|| 
 |PE|1|Parity (E1..E36)| 
 |S|21|S1..S21|| 
 |D|1132|D1..D1132|Data bits| 
 |TA|16|TA1..TA16|Time Alignment bits| 
 |Total|1328| 

 h4. PCU-DATA-MCS9.ind 

 |T|17|T0*16,T1*1|Sync Word| 
 |D|48|D1..D48|Data bits| 
 |C|8|C1..C8|Control Bits| 
 |PC|1|PC|Parity (C1..C8)| 
 |E|9|E1..E9|| 
 |PE|1|Parity (E1..E36)| 
 |D|1172|D49..D1228|Data bits| 
 |TA|16|TA1..TA16|Time Alignment bits| 
 |Total|1272| 

 h4. CCU-DATA-64.ind 

 |T|65|T0*64,T1*1|Sync Word| 
 |C|7|C1..C7|Control bits (FT, TAV)| 
 |PC|1|PC|Parity (C1..C7)| 
 |E|57|E1..E57|DBE, Codec Status, Receiver Level, Access Delay Deviation, Block Quality Measurement, Block Status Report, Spare, MEAN_BEP, CV_BEP, Header Quality, Data Block Quality| 
 |PE|1|PE|Parity (E1..E57)| 
 |S|3|S1..S3|Spare (set to 1)| 
 |D|1138|D1..D1138|Data bits| 
 |TA|8|TA1..TA8|Time Alignment bits| 
 |Total|1280| 

 h4. CCU-DATA-MCS9.ind 

 |T|17|T0*16,T1*1|Sync Word| 
 |D|48|D1..D48|Data bits| 
 |C|7|C1..C7|Control bits| 
 |PC|1|PC|Parity (C1..C7)| 
 |E|23|E1..E23|| 
 |PE|1|PE|Parity (E1..E23)| 
 |S|2|Spare| 
 |D|1165|D49..D1221|Data bits| 
 |TA|8|Time Alignment bits| 
 |Total|1272| 

 h4. CCU-SYNC-64.ind 

 Sent from CCU to PCU (uplink) 

 |T|17|T0*16+T1*1|Sync Word| 
 |C|8|C1..C8|Control bits (FT, TAV, DFE)| 
 |PC|1|PC|Parity (C1..C8)| 
 |E|1|E1|DBE (DownlinkBlockError)| 
 |PE|1|PE|Parity (E1)| 
 |D|44|D1..D44|Data bits| 
 |T|1|T1|| 
 |D|55|D45..D99|Data bits| 
 |T|1|T1|| 
 |D|1079|D100..D1178|Data bits (DPSEQ, DaFNu, DaFNd)| 
 |TA|8|TA1..TA8|Time Alignment bits| 
 |Total|1216| 

 h4. PCU-SYNC-64.ind 

 |T|65|T0*64+T1*1|Sync Word| 
 |C|8|C1..C8|Control| 
 |PC|1|Parity (C1..C8)| 
 |D|54|D1..D53|Data bits| 
 |T|1|T1|| 
 |D|63||Data bits| 
 |T|1|T1|| 
 |D|1071|..D1172|Data bits| 
 |TA|16|TA1..TA16|Time Alignment bits| 
 |Total|1280| 

 h2. Trau Procedures 

 h3. SYNC procedure 

 Whenever the uplink is idle, the CCU is sending CCU-SYNC.ind towards the PCU.    This frame includes: 
 * Time Adjustment Value 
 ** 00: no change 
 ** 01: delay 250us 
 ** 10: advance 250us 
 * Downlink Frame Error: Set to '0' in case the CCU receives bad downlink frames from the PCU 
 ** once we send valid frames in downlink, the bit should change to '1' 
 * Downlink Block Error: Set to '0' when a downlink block was not transmitted 
 * DPSEQ: ? 
 * afn_ul: Adjusted Frame Number Upliink 
 * afn_dl: Adjusted Frame Number Downlink 

 Whenever the downlink is idle, the PCU is sending PCU-SYNC.nd towards the CCU. This frame includes: 
 * Time Adjustment Value (see above) 
 * Uplink Frame Error: Set to '0' in case the PCU receives bad uplink frames from the CCU 
 * DPSEQ: PCU-internal counter which probably gets echo'ed back in uplink DPSEQ for the PCU to measure RTT? 
 * optional dss, dfn_u, dfn_ss, dfn_d and dls fields, ignored by PCU. Trau Procedures.
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