TC1 (TC2050) pin 4 should connect to VDD network, not VDD_3V3
18:33 < horizon> LaF0rge: it looks like there's a bug at TC1 pin 4, the net name should be VDD instead of VDD_3V3? 18:33 < horizon> thats why its not connected and does not power my SWD adaptor 19:35 <@LaF0rge> horizon: and yes, you appear to be correct
- change schematics / board design
- rework boards?
I'm a bit surprised to see issues like this. Shouldn't the ERC of Eagle catch a network with only one connection? How can we produce something like that? Indeed, it does' But The "Only one pin on net VDD_3V3" was "approved" :(
Also, AFAIR roh did see the CPUID via SWD in OpenOCD? That might be related to different SWD adapter?
- Checklist item change schematics / board design added
- Checklist item rework boards? added
- Status changed from New to In Progress
- % Done changed from 0 to 50
commit 617288296fc07df28753944d9299e00a7cd9b931 (HEAD -> master) Author: Harald Welte <email@example.com> Date: Sun Mar 1 19:41:00 2020 +0100 clock-generator: Fix VDD connection of TC2050 SWD connector Closes: OS#4431
- File openocd.cfg openocd.cfg added
- File openocd_flash_bootloader.cfg openocd_flash_bootloader.cfg added
- File openocd_flash_bootloader.sh openocd_flash_bootloader.sh added
i had some issue with some jtag intefacees working, others not.
i think versaloon worked in the end.
here is the openocd config which i think i used for this board
shouldn't the ERC of Eagle catch a network with only one connection?
My suspicion is that the ERC was made before these signals where named reasonably, and in a subsequent ERC, a generic auto-named signal throwing a warning, tends to get neglected... Lesson learned here: give all relevant signals a proper naming before ERC.