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Iota » History » Revision 11

Revision 10 (steve-m, 02/19/2016 10:49 PM) → Revision 11/13 (laforge, 02/21/2016 08:17 AM)

h1. Iota (TWL3025) 

 This is the Analog Baseband Chip TWL3025 

 It's very similar to its predecessors, the TWL3014 and TWL3016 devices. 

 A data sheet for the TWL3014 is available from http://www.52rd.com/bbs/Detail_RD.BBS_8719_68_1_1.html 
 but forum registration is required for download. 

 It consists of various functions, including 
 * ADC and DAC for the GSM baseband signals 
 * ADC and DAC for the Voice/Audio path 
 * DAC for APC (Automatic Power Control) 
 * DAC for AFC (Automatic Frequency Control) 
 * Battery Charging Controller 
 * LDO's (Linear Power Regulators) 

 The functions of the ABB are controlled by a register set.    The register set 
 is available through both USP and BSP. 


 


 h2. External Interfaces == 
  USP (uController Serial Port) === 

 This is the SPI-like control interface between DBB and the TWL3025 (ABB). 

 [[Image(Iota:twl3025_usp.png)]] 


 


 h3. TSP (Timee Serial Port) 


 


 It is connected to the TSP controller inside the [[HardwareCalypso]] DBB. 

 The CLK6.5 Signal makes things a bit more complicated than we would like. The sequence of events is something like: 
 * CLK_13M is applied continuously to TWL3025 
 * nTEN is in default state of high (inactive) 
 * internal CLK6.5 is in default state low 
 * nTEN is asserted low by TPU, some 0..65ns before CLK_13M rising edge 
 * next CLK13M falling edge starts first CLK6.5 rising edge 
 * every falling edge of CLK13M toggles CLK6.5 
 * TDR is sampled at every rising edge of CLK6.5 (including the first edge above) 
 * 7 bits are transferred during seven rising edges of CLK6.5 
 * TEN stays asserted for 1 CLK13M period after last bit is transferred 
 * TEN needs to be released before next CLK13M rising edge to prevent another transfer 


 


 h3. BSP (Baseband Serial Port) 


 


 This synchronous serial port is connected to the RIF (Radio [[InterFace]]) of the Calypso DBB. 


 


 h3. Debug traces 


 


 The chip has very tiny debug traces on a small flex-pcb around the 4 sides of the chip. 
 Which trace goes to which ball can be seen on this scan: http://www.steve-m.de/pictures/iota_bottom.jpg  

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