SonyEricssonJ100i » History » Version 9
steve-m, 02/19/2016 10:49 PM
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1 | 1 | [[PageOutline]] |
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2 | 4 | ||
3 | 1 | = Sony Ericsson J100i = |
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4 | |||
5 | 3 | The J100i seems to be one of many ODM phones that Sony Ericsson bought from Compal communications in Taiwan. |
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6 | |||
7 | 1 | == Specifications == |
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8 | |||
9 | 3 | * GSM 900 / GSM 1800 dual-band (J100i) |
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10 | * GSM 850 / GSM 1900 dual-band (J100a) |
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11 | * 100 x 44 x 18 mm, 79g |
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12 | * STN 65k - 96 x 64 pixels |
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13 | * 900mAh Li-Po battery |
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14 | * Ti Calypso/Iota/Rita chipset |
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15 | |||
16 | 1 | == Hardware == |
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17 | |||
18 | 9 | steve-m | [[Image(se_j100_pcb_small.2.jpg)]][[BR]] |
19 | large version: [raw-attachment:se_j110_pcb.jpg] |
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20 | 4 | ||
21 | 3 | === Schematics === |
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22 | |||
23 | They can be found here: http://files.shrak-mobile.com/schem/se/J100_schem.rar |
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24 | |||
25 | 1 | === GSM Chipset === |
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26 | |||
27 | * DBB: Ti Calypso Baseband, D751749ZHH model (Calypso Lite G2), includes 256kBytes of internal SRAM |
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28 | * ABB: Ti TWL3025BZ |
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29 | * RF: Ti TRF 6151CJ |
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30 | * RF PA: SKY77328-13 |
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31 | |||
32 | === NOR Flash + SRAM === |
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33 | |||
34 | * Intel RD38F1010C0ZTL0 |
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35 | 3 | * 32MBit NOR (4 MByte) |
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36 | * 4Mbit SRAM (512 KByte) |
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37 | 1 | ||
38 | 2 | === Audio ringtone === |
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39 | 1 | ||
40 | 2 | * Macronix MX92U832AZCG (unknown datasheet) |
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41 | |||
42 | 3 | === Display === |
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43 | |||
44 | The display is a 96 x 64 pixels CSTN color display attached to the Calypso DBB via the uWire interface (nReset, nSCS0, SCK, SDO). The backlight is controlled by the DBB IO1. |
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45 | Exact model unknown for now. |
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46 | |||
47 | 2 | === Test points === |
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48 | |||
49 | There are some easily accessible test points (i.e. bigsqare and not very small round pads behind the rf shields). |
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50 | |||
51 | Theses test points are divided in two groups (when looking from behind the phone) : |
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52 | |||
53 | * A group of 7 TPs at the lower left of the PCB. Accessible from the battery compartment without disassembly except for the first one. From left to right : |
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54 | * '''TP16''': JTAG TDO |
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55 | * '''TP9''': CTS MODEM |
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56 | * '''TP13''': TX MODEM |
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57 | * '''TP14''': RX MODEM |
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58 | * '''TP3''': DL PWR |
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59 | * '''TP107''': GND |
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60 | * '''TP19''': VBAT |
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61 | * A group of 5 TPs at the middle/upper right of the PCB. Theses are not accessible without disassembly, but could be by cutting a small plastic strip just right of the hole made for the battery connector. From left to right: |
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62 | * '''TP18''': JTAG TMS |
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63 | * '''TP20''': BAT_TEMP |
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64 | * '''TP17''': JTAG TCK |
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65 | * '''TP15''': VCHG |
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66 | * '''TP8''': JTAG TDI |
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67 | 3 | ||
68 | == Misc notes == |
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69 | |||
70 | === Bootloader === |
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71 | 1 | ||
72 | 7 | steve-m | * The RAM loader of the J100i is the same as used on the [wiki:MotorolaC140] series and it works fine with osmocon. It however expects a "1003" magic word to be present at address 0x803ce0. |
73 | 8 | * To bypass this limitation, use the Calypso romloader to chainload the application. Here's an example for loading [wiki:layer1.bin]: |
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74 | 7 | steve-m | |
75 | {{{ |
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76 | $ ./osmocon -p /dev/ttyUSB0 -m c140 -c ../../target/firmware/board/compal_e99/layer1.highram.bin ../../target/firmware/board/compal_e99/chainload.compalram.bin |
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77 | }}} |