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iCE40 E1 USB interface

This page is the main entry point for the E1 Software defined interface using the iCE40 FPGA as the core.

Architecture

This approach tries to implement as much as possible inside an iCE40 FPGA

Particularly, the iCE40 FPGA
  • contains the E1 PHY. There is no external LIU*, reducing the BOM cost significantly. Instead, the comparators of the FPGA are used. In practice, this has shown to work on short E1 links of a few meters. We'd expect some problems in terms of long-haul E1 links, but those are not really the target use case here.
  • contains the E1 framer, including frame alignment
  • contains a USB softcore (no external USB PHY needed)
  • contains a PicoRISCV softcore to implement USB protocol handling and to connect the E1 softcore with the USB softcore

So all-in-all, we can build a USB-E1 interface from little more than an iCE40 FPGA and an E1 line transformer!

picture of iCEBreaker + external circuitry (transformer, ..)

Current stack

Presentations

video recording of the iC40 based approach / OsmoDevCoon 2019

Status

The full stack from hardware/gateware through firmware and host software has shown to be functional, but hasn't yet been used/tested extensively.

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