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XMU 02

The XMU 02 seems to be some kind of CPRI front-haulmultiplexor. It appears to be used in situations where a (small number of) high-bitrate CPRI links from the DU is to be de-multiplexed to multiple more lower-bitrated CPRI links towards the RU.

It appears to be controlled via some RS485 based control channel. There are three MAX3485 transcevers for each of the three RJ45 connectors on the front (A1, A2, A3).

Internal structure

FPGA

Internally, it appears to be one large (44x44mm, >= 42x42 ball BGA) part, probably a FPGA, connected to the 14 SFP+ slots for CPRI.

Next to the FPGA are two SN74CB3T16211 24bit bus-switch/level-shifters.

SoC

There's a control SoC ("Ericsson ROP 101 1190/2") with FLASH + RAM

Clocking

There are three clock sections,
Files (4)
42-45S32800D.pdf View 42-45S32800D.pdf 831 KB SDRAM data sheet laforge, 11/07/2020 08:36 AM
RC48F4400P0TB0E.pdf View RC48F4400P0TB0E.pdf 3.94 MB NOR flash data sheet laforge, 11/07/2020 08:36 AM
AD9510.pdf View AD9510.pdf 1.04 MB clock distribution / buffer data sheet laforge, 11/07/2020 08:36 AM
000356709.pdf View 000356709.pdf 69.7 KB Epcos B5217 VCXO cleanup filter laforge, 11/07/2020 08:41 AM

Updated by laforge over 3 years ago · 3 revisions

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