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4cd82c23
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Christian Daniel
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/**************************************************************
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*
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* Revision History of opcode.h
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*
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*
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* 09/11/07 NN Updated to support version 1.3
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* This version supported new POLING STATUS LOOP opcodes
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* for Flash programming of the Lattice FPGA devices
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* #define LOOP = 0x58
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* #define ENDLOOP = 0x59
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***************************************************************/
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/*************************************************************
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* *
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* LATTICE CABLE DEFINTIONS. *
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* *
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* Define these only if the lattice cable is being used. *
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* *
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*************************************************************/
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#define pinTDI 1
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#define pinTCK 2
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#define pinTMS 4
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#define pinENABLE 8
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#define pinTRST 16
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#define pinCE 32
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#define pinTDO 64
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/*************************************************************
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* *
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* ERROR DEFINITIONS *
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* *
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*************************************************************/
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#define ERR_VERIFY_FAIL -1
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#define ERR_FIND_ALGO_FILE -2
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#define ERR_FIND_DATA_FILE -3
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#define ERR_WRONG_VERSION -4
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#define ERR_ALGO_FILE_ERROR -5
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#define ERR_DATA_FILE_ERROR -6
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#define ERR_OUT_OF_MEMORY -7
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/*************************************************************
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* *
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* DATA TYPE REGISTER BIT DEFINITIONS *
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* *
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*************************************************************/
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#define SIR_DATA 0x0001 /*** Current command is SIR ***/
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#define SDR_DATA 0x0002 /*** Current command is SDR ***/
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#define TDI_DATA 0x0004 /*** Command contains TDI ***/
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#define TDO_DATA 0x0008 /*** Command contains TDO ***/
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#define MASK_DATA 0x0010 /*** Command contains MASK ***/
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#define DTDI_DATA 0x0020 /*** Verification flow ***/
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#define DTDO_DATA 0x0040 /*** Verification flow ***/
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#define COMPRESS 0x0080 /*** Compressed data file ***/
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#define COMPRESS_FRAME 0x0100 /*** Compressed data frame ***/
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/*************************************************************
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* *
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* USED JTAG STATE *
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* *
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*************************************************************/
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#define RESET 0x00
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#define IDLE 0x01
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#define IRPAUSE 0x02
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#define DRPAUSE 0x03
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#define SHIFTIR 0x04
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#define SHIFTDR 0x05
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#define DRCAPTURE 0x06
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/*************************************************************
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* *
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* VME OPCODE DEFINITIONS *
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* *
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* These are the opcodes found in the VME file. Although *
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* most of them are similar to SVF commands, a few opcodes *
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* are available only in VME format. *
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* *
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*************************************************************/
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#define STATE 0x10
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#define SIR 0x11
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#define SDR 0x12
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#define TCK 0x1B
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#define WAIT 0x1A
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#define ENDDR 0x02
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#define ENDIR 0x03
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#define HIR 0x06
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#define TIR 0x07
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#define HDR 0x08
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#define TDR 0x09
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#define TDI 0x13
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#define CONTINUE 0x70
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#define TDO 0x14
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#define MASK 0x15
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#define LOOP 0x58
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#define ENDLOOP 0x59
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#define LCOUNT 0x66
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#define LDELAY 0x67
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#define LSDR 0x68
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#define ENDSTATE 0x69
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#define ENDVME 0x7F
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/*************************************************************
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* *
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* Begin future opcodes at 0xA0 to avoid conflict with Full *
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* VME opcodes. *
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* *
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*************************************************************/
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#define BEGIN_REPEAT 0xA0
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#define END_REPEAT 0xA1
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#define END_FRAME 0xA2
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#define DATA 0xA3
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#define PROGRAM 0xA4
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#define VERIFY 0xA5
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#define DTDI 0xA6
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#define DTDO 0xA7
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/*************************************************************
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* *
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* Opcode for discrete pins toggling *
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* *
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*************************************************************/
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#define signalENABLE 0x1C /*assert the ispEN pin*/
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#define signalTMS 0x1D /*assert the MODE or TMS pin*/
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#define signalTCK 0x1E /*assert the SCLK or TCK pin*/
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#define signalTDI 0x1F /*assert the SDI or TDI pin*/
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#define signalTRST 0x20 /*assert the RESET or TRST pin*/
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#define signalTDO 0x21 /*assert the RESET or TDO pin*/
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#define signalCableEN 0x22 /*assert the RESET or CableEN pin*/
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