Dimetra EBTS Base Radio Controller CLI » History » Revision 2
Revision 1 (laforge, 02/19/2016 10:52 PM) → Revision 2/4 (laforge, 02/19/2016 10:52 PM)
[[PageOutline]] = Base Radio Controller CLI = There is a CLI (Command Line Interface) of the [[wiki:Dimetra_EBTS/Base_Radio/Controller]] which we are just starting to explore. == Reference == {{{ BRC> help get/set alarm_mask amask get/set alarm_reports ar get alarms a get/set brc_kit_no brckit get/set brc_rev_no brcrev get/set brc_scratch brcscratch get/set cabinet get/set default_tx_power dtxpwr dekey get dsp_version dspver get dsp_sanity sanity get/set enet_id enet get ex_ad exad get/set ex_kit_no exkit get/set ex_rev_no exrev get/set ex_scratch exscratch get/set exciter_scaling_factor exsf get fwd_pwr fp get/set fwd_wattmeter_scaling_factor fwsf key k_factor kf get/set max_vswr mv get/set max_wattmeter_vswr mwv get pa_ad paad get pa_coef pac get/set pa_kit_no pakit get/set pa_rev_no parev get/set pa_scaling_factor pasf get/set pa_scratch pascratch get/set pctrl pc get/set position get ps_ad psad pwr_glitch get/set rear_serial rear_ser get ref_pwr rp get reset_info get/set ref_wattmeter_scaling_factor rwsf get rptr_status status reset get rom_ver rv get rptr_status status get rssi get/set rx_freq rxfreq get/set rx_fru_config rxfru get/set rx_inj rxinj get/set rx_mode rxmode get/set rx_qsign rxqsign get rx_status rxstatus get/set rx1_delta rx1delta get/set rx2_delta rx2delta get/set rx3_delta rx3delta get/set rx1_kit_no rx1kit get/set rx2_kit_no rx2kit get/set rx3_kit_no rx3kit get/set rx1_rev_no rx1rev get/set rx2_rev_no rx2rev get/set rx3_rev_no rx3rev get/set rx1_scaling_factor rx1sf get/set rx2_scaling_factor rx2sf get/set rx3_scaling_factor rx3sf get/set rx1_scratch rx1scratch get/set rx2_scratch rx2scratch get/set rx3_scratch rx3scratch get second_level_pswd get/set tetra_format tf set tone get/set training_interval ti get/set txdc_i txdci set txdc_i_final txdci_final get/set txdc_q txdcq set txdc_q_final txdcq_final get/set tx_freq txfreq get/set tx_if txif set tx_power power get/set txlin set txlin_default txldef get txlin_stat txlinstat get/set txlin2 get txlin2_stat txlin2stat get/set tx_test_mode ver get vswr get wattmeter w BSC> }}} === dsp_version === {{{ BRC> get dsp_version DSP VERSION is 2.14 BRC> get tetra_format MCC : 0 MNC : 0 CC : 1 Downlink Type : 1 Uplink Type : 7 Trigger : off MS Power: 20 dBm ACC param: 203 dBm }}} === tx_if === {{{ BRC> get txif TRANSMIT INTERMEDIATE FREQUENCY is 90.00000 MHz. }}} === txlin === {{{ BRC> get txlin TXLIN[0x00]: 0x56 TXLIN[0x01]: 0x08 TXLIN[0x02]: 0x15 TXLIN[0x03]: 0x3E TXLIN[0x04]: 0xF1 TXLIN[0x05]: 0x1E TXLIN[0x06]: 0x2C TXLIN[0x07]: 0x00 TXLIN[0x08]: 0x3A TXLIN[0x09]: 0xBB TXLIN[0x0A]: 0x53 TXLIN[0x0B]: 0x80 TXLIN[0x0C]: 0xA3 TXLIN[0x0D]: 0x06 TXLIN[0x0E]: 0x04 TXLIN[0x0F]: 0x0C TXLIN[0x10]: 0x38 TXLIN[0x11]: 0x08 TXLIN[0x12]: 0x00 TXLIN[0x13]: 0x1F TXLIN[0x14]: 0x40 TXLIN[0x15]: 0x13 TXLIN[0x16]: 0xFF TXLIN[0x17]: 0x00 TXLIN[0x18]: 0x00 TXLIN[0x19]: 0x02 TXLIN[0x1A]: 0x00 BRC> get txlin2 TXLIN2[0x00]: 0x56 TXLIN2[0x01]: 0x08 TXLIN2[0x02]: 0x55 TXLIN2[0x03]: 0x3E TXLIN2[0x04]: 0xF1 TXLIN2[0x05]: 0x1E TXLIN2[0x06]: 0x2C TXLIN2[0x07]: 0x00 TXLIN2[0x08]: 0x3A TXLIN2[0x09]: 0xBB TXLIN2[0x0A]: 0x53 TXLIN2[0x0B]: 0x80 TXLIN2[0x0C]: 0xA3 TXLIN2[0x0D]: 0x06 TXLIN2[0x0E]: 0x04 TXLIN2[0x0F]: 0x0C TXLIN2[0x10]: 0x38 TXLIN2[0x11]: 0x08 TXLIN2[0x12]: 0x00 TXLIN2[0x13]: 0x1F TXLIN2[0x14]: 0x7F TXLIN2[0x15]: 0x13 TXLIN2[0x16]: 0xFF TXLIN2[0x17]: 0x00 TXLIN2[0x18]: 0x00 TXLIN2[0x19]: 0x02 TXLIN2[0x1A]: 0x00 BRC> get txlin_stat Checksum: 1566 Test Register : 0x2 Clip Detect Bit OFF Local Osc. Locked I - Channel Software Offset Bit not set Q - Channel Software Offset Bit not set Level Set : 0xff Sine Value : 0x89 Cosine Value : 0x0 }}} this seems like filter taps for a digital linearization filter in the DSP? === default_tx_power === {{{ BRC> get default_tx_power DEFAULT TRANSMITTER POWER is 40.00 watts ( 46.02 dBm ) BRC> set dtxpwr 2 FORMAT: set default_tx_power { 2.5 -> 40.0 } BRC> set dtxpwr 2.5 Warning: Request to write to EEPROM denied due to insufficient permissions. }}} === max_vswr === {{{ BRC> get max_vswr MAXIMUM VSWR is 4.00:1 BRC> set max_vswr 1.1 set MAX VSWR to 1.1 in RAM Warning: Request to write to EEPROM denied due to insufficient permissions. }}} === wattmeter === {{{ BRC> get wattmeter BRC> RD POWER AT WATTMETER is 5.6 Watts [37.5 dBm] BRC> CTED POWER AT WATTMETER is 1.7 Watts [32.4 dBm] BRC> ETER VSWR is 3.49:1 }}} === tx_freq === {{{ BRC> get tx_freq TRANSMIT FREQUENCY is 427.50000 MHz }}} === training_interval === {{{ BRC> get ti TRAINING INTERVAL is 90000 ticks (15 min) }}} === rx_mode === {{{ BRC> get rx_mode RECEIVER 1 ENABLED RECEIVER 2 ENABLED RECEIVER 3 ENABLED }}} === rx_status === {{{ BRC> get rx_status BER STATUS is LOCKED RECEIVER Q SIGN is NON-INVERTED RECEIVER 1 ENABLED RECEIVER 2 ENABLED RECEIVER 3 ENABLED RECEIVER INJECTION is HIGH }}} === paad === {{{ BRC> get paad PA A->D PORT[0] = 0x0 [0.00v]. PA A->D PORT[1] = 0x0 [0.00v]. PA A->D PORT[2] = 0x2 [0.04v]. PA A->D PORT[3] = 0x80 [2.48v]. PA A->D PORT[4] = 0x9 [0.17v]. PA A->D PORT[5] = 0xd [0.25v]. PA A->D PORT[6] = 0x1 [0.06v]. PA A->D PORT[7] = 0x1 [0.06v]. PA A->D PORT[8] = 0x9 [0.17v]. PA A->D PORT[9] = 0x80 [2.48v]. PA A->D PORT[10] = 0x1 [0.04v]. PA A->D PORT[11] = 0x80 [2.50v]. }}} This seems to be the ADC readings of the PA power supply === forwrd_power === {{{ BRC> get fp FORWARD POWER is 0 watts [-Inf dbm] }}} === tx_freq === {{{ BRC> get tx_freq TRANSMIT FREQUENCY is 427.50000 MHz }}} === exciter_ad === {{{ BRC> get ex_ad EXCITER A->D PORT[0] = 0x68 [13.71v]. EXCITER A->D PORT[1] = 0x5 [0.08v]. EXCITER A->D PORT[2] = 0xa1 [9.84v]. EXCITER A->D PORT[3] = 0xff [4.98v]. EXCITER A->D PORT[4] = 0x7b [4.80v]. EXCITER A->D PORT[5] = 0x27 [0.76v]. EXCITER A->D PORT[6] = 0x43 [1.31v]. EXCITER A->D PORT[7] = 0x0 [0.00v]. EXCITER A->D PORT[8] = 0x80 [5.00v]. EXCITER A->D PORT[9] = 0x8 [0.08v]. EXCITER A->D PORT[10] = 0x3 [0.03v]. EXCITER A->D PORT[11] = 0x80 [2.50v]. }}} === ex_kit_no === {{{ BRC> get ex_kit_no EXCITER KIT NUMBER is CTX5062B }}} === tetra_format === {{{ BRC> get tetra_format MCC : 0 MNC : 0 CC : 1 Downlink Type : 1 Uplink Type : 7 Trigger : off MS Power: 20 dBm ACC param: 203 dBm BRC> set tetra_format 262 42 1 1 7 off 20 203 The value entered for MS power was not valid. 15 dBm is the default setting and has been used. MCC : 262 MNC : 42 CC : 1 Downlink Type : 1 Uplink Type : 7 Trigger : off MS Power: 20 dBm ACC param: 203 dBm }}} === rptr_status === {{{ BRC> get rptr_status ************************************************************ BRC CODE VERSION D07.00.20-TETRA-BRC-ROM OUTPUT PORT 0 = 0x808604 INPUT PORT 0 = 0xc9881f INPUT PORT 1 = 0x808604 NUMBER WORKING RECEIVERS DETECTED : 3. RX1 PRESENT... RX2 PRESENT... RX3 PRESENT... BAND : TETRA {430 MHz} RX FREQUENCY : 417.50000 TX FREQUENCY : 427.50000 TX IF FREQUENCY : 90.00000 MHz. WINDOW CLIPPING LEVEL: 5.500000 db. WINDOW CLIPPING SATURATION LEVEL: 15.000000 db. WINDOW CLIPPING MODE: ON SGC STATUS : ENABLED SGC DELAY : 0 units = 0.000000 msec. [msec = units/120] PERIODIC TRAINING DISABLED. [900 SECONDS]. POWER LEVELING DISABLED. [300 SECONDS]. RF POWER REPORTS DISABLED. RF ALARM REPORTS DISABLED. POWER WATCHDOG ENABLED. INITILIZATION TRACE DISABLED. ALARM MASK : |ff|ff|ff|ff|ff|ff|ff|ff|ff|ff|ff|ff|ff|ff|ff|ff| }}}