Hardware Projects » E1/T1 Hardware Interface (including icE1usb)

h1. Atmel SAM Approach

This page describes a proposed approach of implementing the E1 adapter using [[osmo-e1-xcvr]] and an Atmel SAMx microcontroller, suhc as a SAM3S or SAM4S.

* "SAM4S Manual":http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-6500-32-bit-Cortex-M3-Microcontroller-SAM3S4-SAM3S2-SAM3S1_Datasheet.pdf (64 MHz Cortex-M3)

* "SAM4S Manual":http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-11100-32-bit%20Cortex-M4-Microcontroller-SAM4S_Datasheet.pdf (120 MHz Cortex-M4)

h2. Overview

* the SAM controls the LIU via SPI

* the SAM attaches to the host via USB

* The SAM *SSC Peripheral* is used to interface to the receive + transmit bit-streams of the LIU

* The SAM3 *TC Peripheral* is used for Rx frame alignment

h2. Serializing/Deserializing

* SSC can receive/transmit synchronous serial bit streams with external or internal clock

* SSC supports DMA operation between the (de)serializer and RAM using PDC (peripheral DMA controller)

* SSC can run either 

** continously (frame alignment done in software [possibly using bit-banding], as no octet alignment of frames), or

** triggered by RF input, which we supply from SSC (see below) with hardware-assisted frame alignment

h2. Frame Alignment using TC (Timer/Counter)

The idea is to use one of the TC units to perform hardware-assisted frame alignment and this way prevent us from having to do tons of bit-shifting in software in order to align the start of the 256 bit E1 frame with an octet boundary.

* received clock is fed into TCLKx

* internal 16-bit counter is set to count up to 256 (one frame duration)

* TC is operated in WAVEFORM mode

* TIOA or TIOB are operated as output routed to the SSC RF (receive frame) input

* Ra/Rb/Rc registers are used to shift the rising and falling edge of the TIOA/TIOB signal within the 256bit frame