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Qualcomm Kernel » History » Version 13

laforge, 12/25/2016 10:08 PM

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{{>toc}}
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h1. Qualcomm Kernel
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Random notes about the Qualcomm Kernel as used on the MDM9615 and MDM9x07.  May also apply to other Qualcomm Linux based systems such as Android smartphones.
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h2. diag
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h3. diag forwarding
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<pre>
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drivers/char/diag/diagfwd.[ch]
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drivers/usb/gadget/f_diag.[ch]
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drivers/usb/misc/diag_bridge.c
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</pre>
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* the usb diag gadget handles diag packet read/write over usb
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* issues events like USB_DIAG_READ_DONE
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* picked up by diagfwd.c
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** can forward diag requests via SMD shared memory to other processors
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h3. diag char
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The kernel exports a /dev/diag char device which userspce processes can
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use to register/listen for DIAG events from the system, or actually
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register a DIAG 'subsystem' themselves which can then be controlled from
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QXDM.
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<pre>
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drivers/char/diag/diagchar_core.c
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</pre>
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* ioctl()s for diag configuration
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* supports several concurrent diag clients
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* diag logging can be directed to USB/HSIC, character device and more
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** {USB,CALLBACK,MEMORY_DEVICE,UART,NO_LOGGING}_MODE
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drivers/char/diag/diag_dci.c
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* DCI table is a routing table where pid/sockets can register for a
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  given DCI.  socket close/cleanup code releases all DCI routes for
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  that socket.
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h4. DIAG_IOCTL_COMMAND_REG
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* Register a new DIAG command so it can be used from the outside world (QXDM)
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* use 'struct diag_cmd_reg_entry_t' per command
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* driver keeps a driver->cmd_reg_list of registered commands
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h4. DIAG_IOCTL_COMMAND_DEREG
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* unregister debug command
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h4. DIAG_IOCTL_GET_DELAYED_RSP_ID
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h4. DIAG_IOCTL_DCI_REG
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h4. DIAG_IOCTL_DCI_DEINIT
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h4. DIAG_IOCTL_DCI_SUPPORT
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h4. DIAG_IOCTL_DCI_HEALTH_STATS
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h4. DIAG_IOCTL_DCI_LOG_STATUS
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h4. DIAG_IOCTL_DCI_EVENT_STATUS
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h4. DIAG_IOCTL_DCI_CLEAR_LOGS
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h4. DIAG_IOCTL_DCI_CLEAR_EVENTS
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h4. DIAG_IOCTL_LSM_DEINIT
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h4. DIAG_IOCTL_SWITCH_LOGGING
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* switch between USB and shared-memory diag
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* 
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h4. DIAG_IOCTL_REMOTE_DEV
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h4. DIAG_IOCTL_VOTE_REAL_TIME
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h4. DIAG_IOCTL_GET_REAL_TIME
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h4. DIAG_IOCTL_PERIPHERAL_BUF_CONFIG
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h4. DIAG_IOCTL_PERIPHERAL_BUF_DRAIN
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h4. DIAG_IOCTL_REGISTER_CALLBACK
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* doen't really do anything but checking arguments ?!?
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h4. DIAG_IOCTL_HDLC_TOGGLE
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enable or disable HDLC framing of /dev/diag
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h2. IRSC (IPC Router Security Control)
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FIXME
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h2. Shared Memory based Logging
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h2. SMD (shared memory)
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* SMD sub-systems:
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** Modem (assumed to be hexagon with modem firmware?)
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** Q6 (formerly known as LPASS == Low Power Audio SubSystem)
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** DSPS
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** WCNSS (Wireless Connectivity Sub System) aka 'riva'
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** RPM (Resource Power Manager)
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* inter-processor-interrupts for various 'edges'
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h3. core driver
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* arch/arm/mach-msm/smd.c
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h4. api
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* smd_open()
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* smd_close()
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* smd_write*()
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* smd_read*()
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* smsm_*()
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h3. MSM IPC (Inter Process Communications) socket
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Qualcomm implements a socket-based inter process communication on Linux.  It is implemented using a new address family, @AF_MSM_IPC@ (27).
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The socket is used as datagram type socket (SOCK_DGRAM).
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The socket address of a related socket consists of:
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* the socket family (AF_MSM_IPC)
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* a @struct msm_ipc_addr@, consisting of
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** a single address type byte
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** a port address (node_id, port_id)
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** a port name (service, instance)
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* arch/arm/mach-msm/ipc_socket.c
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* AF_MSM_IPC
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h3. packet ports
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* Some kind of packet oriented interface towards the SMD
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* msm_smd_pkt.c contains driver
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** smdpkt0..7+smd22 devices, 2048 byte buffer
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** open/release/read/write/poll syscalls implemented
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h3. available SMD devices
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From an EC25:
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<pre>
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Primary allocation table:
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root@mdm9607-perf:~# cat /sys/kernel/debug/smd/ch
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ID|CHANNEL NAME       |T|PROC |STATE  |FIFO SZ|RDPTR  |WRPTR  |FLAGS   |DATAPEN
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-------------------------------------------------------------------------------
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 4|rpm_requests       |P|APPS |OPENED |0x00400|0x001E0|0x001E0|DCCiwRsB|0x00000
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  |                   | |RPM  |OPENED |0x00400|0x00118|0x00118|DCCiwrsB|0x00000
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-------------------------------------------------------------------------------
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 5|rpm_requests       |P|MDMSW| Access Restricted
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  |                   | |RPM  | Access Restricted
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-------------------------------------------------------------------------------
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 6|rpm_requests       |P|WCNSS| Access Restricted
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  |                   | |RPM  | Access Restricted
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-------------------------------------------------------------------------------
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 7|rpm_requests       |P|TZ   | Access Restricted
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  |                   | |RPM  | Access Restricted
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-------------------------------------------------------------------------------
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 8|rpm_requests       |P|ADSP | Access Restricted
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  |                   | |RPM  | Access Restricted
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-------------------------------------------------------------------------------
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APPS <-> MDMSW Primary allocation table:
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ID|CHANNEL NAME       |T|PROC |STATE  |FIFO SZ|RDPTR  |WRPTR  |FLAGS   |DATAPEN
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-------------------------------------------------------------------------------
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 0|DS                 |S|APPS |OPENED |0x02000|0x00000|0x00000|dcCiwrsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00000|0x00000|dCciwrsb|0x00000
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-------------------------------------------------------------------------------
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 1|IPCRTR             |P|APPS |OPENED |0x02000|0x012E4|0x012E4|DCCiwrsB|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x011F8|0x011F8|DCCiwrsB|0x00000
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-------------------------------------------------------------------------------
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 2|SSM_RTR_MODEM_APPS |P|APPS |CLOSED |0x02000|0x00000|0x00000|dcciwrsb|0x00000
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  |                   | |MDMSW|OPENING|0x02000|0x00000|0x00000|DCCiwrSb|0x00000
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-------------------------------------------------------------------------------
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 3|DIAG_2_CMD         |P|APPS |OPENED |0x02000|0x00000|0x00000|DCCiwrsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00000|0x00000|DCCiwrsb|0x00000
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-------------------------------------------------------------------------------
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 4|DIAG_2             |P|APPS |OPENED |0x02000|0x00000|0x00000|DCCiwrsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00000|0x00000|DCCiwrsb|0x00000
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-------------------------------------------------------------------------------
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 5|DIAG_CNTL          |P|APPS |OPENED |0x02000|0x00062|0x00062|DCCiwrsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x007F5|0x007F5|DCCiwrsB|0x00000
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-------------------------------------------------------------------------------
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 6|DIAG_CMD           |P|APPS |OPENED |0x02000|0x00000|0x00000|DCCiwrsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00000|0x00000|DCCiwrsb|0x00000
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-------------------------------------------------------------------------------
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 7|DIAG               |P|APPS |OPENED |0x02000|0x00000|0x00000|DCCiwrsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00026|0x00026|DCCiwrsB|0x00000
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-------------------------------------------------------------------------------
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 8|apr_audio_svc      |P|APPS |OPENED |0x02000|0x002F0|0x002F0|DCCiwrsB|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00248|0x00248|DCCiwrsB|0x00000
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-------------------------------------------------------------------------------
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 9|apr_apps2          |P|APPS |CLOSED |0x02000|0x00000|0x00000|dcciwrsb|0x00000
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  |                   | |MDMSW|OPENING|0x02000|0x00000|0x00000|DCCiwrSb|0x00000
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-------------------------------------------------------------------------------
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10|DATA1              |P|APPS |OPENED |0x02000|0x00000|0x00000|DCCiwrsB|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00000|0x00000|dCciwrsb|0x00000
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-------------------------------------------------------------------------------
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11|DATA2              |P|APPS |CLOSED |0x02000|0x00000|0x00000|dcciwrsb|0x00000
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  |                   | |MDMSW|OPENING|0x02000|0x00000|0x00000|dCciwrSb|0x00000
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-------------------------------------------------------------------------------
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12|DATA3              |P|APPS |OPENED |0x02000|0x00000|0x00000|dcCiwrsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00000|0x00000|dCciwrsb|0x00000
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-------------------------------------------------------------------------------
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13|DATA4              |P|APPS |OPENED |0x02000|0x00000|0x00000|DCCiwrsB|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00000|0x00000|dCciwrsb|0x00000
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-------------------------------------------------------------------------------
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14|DATA11             |S|APPS |OPENED |0x02000|0x00089|0x00089|dcCiwRsb|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x0012B|0x0012B|dCciwrsB|0x00000
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-------------------------------------------------------------------------------
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15|DATA40             |P|APPS |CLOSED |0x02000|0x00000|0x00000|dcciwrsb|0x00000
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  |                   | |MDMSW|OPENING|0x02000|0x00000|0x00000|dcciwrSb|0x00000
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-------------------------------------------------------------------------------
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16|DATA5_CNTL         |P|APPS |CLOSED |0x00400|0x00000|0x00000|dcciwrsb|0x00000
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  |                   | |MDMSW|OPENING|0x00400|0x00000|0x00000|DCCiwrSb|0x00000
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-------------------------------------------------------------------------------
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17|DATA40_CNTL        |P|APPS |OPENED |0x02000|0x00000|0x00000|DCCiwrsB|0x00000
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  |                   | |MDMSW|OPENED |0x02000|0x00100|0x00100|DCCiwrsB|0x00000
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-------------------------------------------------------------------------------
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</pre>
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h2. smem_log
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This is some kidn of high speed shared memory based event log to which all processors can log events.
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Userspace applications can use write() to @/dev/smem_log@ to add log entries.
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Qualcomm uses a proprietary minimal shim layer offering SMEM_LOG_EVENT and SMEM_LOG_EVENT6 macros
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that can be used to write events with an event ID plus three data words or six data words, respectively.
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The shared memory log can be read from linux userspace via debugfs, see the devices in @/sys/kernel/debug/smem_log@
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and simply use @cat@ on them. You will get lines like
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<pre>
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MODM: 3982377401 000d0000: 00000001: 03000019 01000028 01000015 53505041 00000061 5f696d71
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MODM: 3982378159      QCSI: 00000004: 00040029 00240015 00000003 00000001 0000002b 00000000
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MODM: 3982378619 000d0000: 00000001: 03000019 0100002b 01000015 53505041 00000061 5f696d71
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APPS: 3982397356      QCCI: 00000005: 0004001d 0024000e 00000003 00000003 00000019 00000000
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APPS: 3982400571      QCCI: 00000005: 00040029 0024000e 00000003 00000003 00000019 00000000
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MODM: 1841235211      QCSI: 00000004: 0004001e 0024001c 00000003 00000001 00000028 00000000
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MODM: 1841236665 000d0000: 00000001: 03000019 01000028 0101001c 53505041 00000061 5f696d71
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MODM: 1841241411      QCSI: 00000004: 0004002a 0024001c 00000003 00000001 0000002b 00000000
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MODM: 1841242246 000d0000: 00000001: 03000019 0100002b 0100001c 53505041 00000061 5f696d71
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MODM: 1841243796      QCSI: 00000004: 0004002b 00660019 00000003 00000001 0000002b 00000000
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MODM: 1841244286 000d0000: 00000001: 03000019 0100002b 01000019 53505041 00000061 5f696d71
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APPS: 1841255456      QCCI: 00000005: 0004001e 00240015 00000003 00000003 00000019 00000000
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MODM: 1841255335 000d0000: 00000002: 0100ffff 0300ffff 07000014 53505041 0000016c 74646d73
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MODM: 1841255828 000d0000: 00000702: 00000001 00000028 00000007
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APPS: 1841261430      QCCI: 00000005: 0004002a 00240015 00000003 00000003 00000019 00000000
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</pre>
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More information in @smem_log.h@
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h2. rmnet
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"remote network" ?
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* consists of control channel and data channel
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* data channel carries IP data
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* control channel carries QMI messages
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* drivers/net/ethernet/msm/msm_rmnet_bam.c
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** ioctl() to set ethernet or rawip (RMNET_IOCTL_SET_LLP_ETHERNET, RMNET_IOCTL_SET_LLP_IP, RMNET_IOCTL_GET_LLP), initial boot time config is ETHERNET
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** use msm_bam_dmux_open() to attach
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** use RMNET_IOCTL_GET_EPID to get the BAM_DMUX endpoint id
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h2. bam (Bus Access Manager/Module)
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* The Bus Access Manager/Module (BAM) can be
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  considered as a distributed data mover (DM)
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* some kind of DMA controller/engine
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* A number of the on-chip devices have their own BAM DMA controller
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  and use it to move data between system memory and peripherals or
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  between two peripherals.
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Files:
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<pre>
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./drivers/dma/qcom_bam_dma.c
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./drivers/net/ethernet/msm/msm_rmnet_bam.c
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./drivers/platform/msm/sps/bam.c
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./drivers/platform/msm/sps/sps_bam.c
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./drivers/platform/msm/usb_bam.c
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</pre>
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* channels (BAM_DMUX_)
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** RMNET_0...7
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** USB_RMNET_0
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** DATA_REV_RMNET_0..8
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** USB_DPL
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seem to be be based on dmux ./drivers/soc/qcom/bam_dmux.c
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h2. IPA (Internet Packet Accelerator)
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Internet Packet Accelerator (IPA) is a programmable protocol
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processor HW block. It is designed to support generic HW processing
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of UL/DL IP packets for various use cases independent of radio
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technology.
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See drivers/platform/msm/ipa/
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http://www.sumobrain.com/patents/wipo/Accelerator/WO2013063791A1.pdf
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h2. bam2bam
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maybe soem kind of direct connection between two peripherals by means of the BAM?
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h2. Android USB Gadget
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see [[Android_USB_Gadget]]
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h2. IPC Logging
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see [[IPC_Logging]]
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