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Bug #5073

closed

repair single via restring rule violation

Added by mschramm about 3 years ago. Updated about 3 years ago.

Status:
Resolved
Priority:
Normal
Assignee:
Category:
electronics
Target version:
-
Start date:
03/12/2021
Due date:
% Done:

100%


Description

For the technology class we want to use for the upcoming production run, an inner and outer restring (annular ring) of at least 0,125mm is needed for the defined finished hole size for vias of 0,25mm. This is maintained all over the PCB - except in one spot (see image (animated gif)), on that spot the restring would only be 0,079 mm, and hence the pre-flight shows an error.

This could have been caused by different settings for e.g. min. distance of copper layers to PCB outline in your defaults over the ones in project. Likely the easiest way to repair this is to move that single via slightly more inwards - better than touching the design rules, but you decide.

(I'm going to report this in github too, it's just to keep track this issue also here.)


Files

restring-violation.gif View restring-violation.gif 16.1 KB mschramm, 03/12/2021 11:26 AM
Screenshot 2021-03-12 165534.png View Screenshot 2021-03-12 165534.png 14.7 KB copper cibomahto, 03/12/2021 03:56 PM
Screenshot 2021-03-12 165906.png View Screenshot 2021-03-12 165906.png 36.7 KB mininal outset cibomahto, 03/12/2021 03:59 PM
Screenshot 2021-03-12 170812.png View Screenshot 2021-03-12 170812.png 157 KB cibomahto, 03/12/2021 04:10 PM
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