GsmDevelBoard » History » Version 1
laforge, 02/19/2016 10:48 PM
1 | 1 | laforge | |
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3 | == Internal Interfaces == |
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5 | In this board, we have a number of interesting internal interfaces. |
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7 | It would be great if we could somehow tap/hook our own processor into those interfaces. |
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9 | === TWL3025 BSP === |
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11 | This is a SPI port with read/write access to all TWL3025 internal registers. However, in case of downlink Rx operation, the burst |
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12 | data is transferred over this port (which needs 8.66Mbps of the 13Mbps bandwidth). It is clocked by CLK13M |
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14 | This typically connects to the Calypso BSP. |
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16 | === TWL3025 USP === |
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18 | This is a generic SPI port for read/write to all TWL3025 internal registers. It is clocked by CLK13M |
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20 | === TWL3025 TSP === |
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22 | The Time Serial Port is clocked by CLK13M/2 and is a pure input port, i.e. a Frame and a Data-In line are sufficient. |
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24 | This typically connects to the Calypso TPU. |
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26 | This interface is used for sequencing the Rx/Tx operation of the baseband interface. |
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28 | === TRF6151C TSP === |
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30 | This is a serial interface with strobe (not chip select). |
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32 | It is mostly used to configure the PLL, PGA Gain and power of the transceiver. |
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34 | This typically connects to the Calypso TSP/TPU |