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Dimetra EBTS Site Controller » History » Version 9

laforge, 02/19/2016 10:52 PM

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{{>toc}}
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h1. Integrated Site Controller (CLN1480A)
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This is a unit that interfaces up to 8 Base Radios with the core network of the Dimetra TETRA network (SwMI).
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Hardware-wise, it is a [[PowerPC]] based system, looking very much like an old-fashioned PC mainboard with both ISA and PCI slots.
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The mainboard houses the [[PowerPC]] CPU and it has slots for RAM.
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There are some extension cards plugged into the system:
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* Clock generation card (ISA, full length).
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** has an integrated GPS receiver, to which you attach a GPS antenna
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** generates the reference 5MHz clock distributed over Coaxial cable to the Base Radios 
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* Ethernet Card using DEC tulip chipset (PCI)
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** This card is what talks to the Base Radios (BR) via 10-Base-2 
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* Unknown card with RJ-45 jack (REDUND) on the back. Might be E1 
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There are further inputs and outputs on the system:
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**** A DB-15 jack for X.21 synchronous serial backhaul (2048Mbps)
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**** FIXME
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**** A RS-232 serial port for local configuration 
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h2. Serial Console ==
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 Boot Log ===
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<pre>
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Copyright Motorola Inc. 1988 - 1996, All Rights Reserved
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ACG Debugger/Diagnostics Release Version 1.0 - 06/24/96
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COLD Start
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Local Memory Found =02000000 (&33554432)
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MPU Clock Speed =100Mhz
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BUS Clock Speed =67Mhz
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Keyboard not connected
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Initializing System Memory (DRAM)...
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System Memory: 32MB, Parity NOT Enabled (Non-Parity-Memory Detected)
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L2Cache:       NONE, Parity NOT Enabled
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[[SelfTest]]/Boots about to Begin... Press <BREAK> at anytime to Abort ALL
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ROMBoot about to Begin... Press <ESC> to Bypass, <SPC> to Continue
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_
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DEC DC21140 (rev 0x2000022) at 0x80810000, irq 9, hwaddr 08:00:3e:c4:d6:9d
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AMCC Motorola SEP/STP at 0x80840000, irq 14
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SRI site reference/watchdog at 0x80000200, board rev. 2
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Memory: 16535k/32768k available (76k kernel, 0k reserved)
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Access Controller Gateway
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Firmware Rev R02.03.02 (PowerPC)
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Copyright (c) 1993-1996
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Motorola, Inc.
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Unauthorized Access Prohibited
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Current status:
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Active/Standby Status:            UNKNOWN
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MAC Address:                      08:00:3e:c4:d6:9d
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To enter configuration mode, hit any key within 10 seconds:
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Waiting for ACTIVE/STANDBY status determination...
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Booting from T1 interface (hit any key to abort).
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ERROR - T1 initialization failed: Stabilization error
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ERROR - T1 initialization failed: Stabilization error
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ERROR - T1 initialization failed: Stabilization error
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</pre>
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h3. Menu
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<pre>
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Enter "help" for a list of commands
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ACG> help
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Available commands:
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  dir                 - Show file directory
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  exit                - Exit configuration mode
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  go                  - Execute application code
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  help                - Print this info
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  inport              - Dump input from a serial port
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  load                - Load file into memory via ethernet
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  loadall             - Load all files into memory via ethernet
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  nvr                 - Dump NVRAM
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  outport             - Send output to a serial port
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  passwd              - Change operator password
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  reset               - Reboot this processor
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  sload               - Load S-records from serial port
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  status              - Print configuration parameters
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  ver                 - Print firmware version
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ACG>
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</pre>
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h2. Images ==
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 Site Controller top view (lid removed) ===
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[[Image(tetra_site_controller_open.jpg, 66%)]]
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h3. PCI Card with lots of Lucent chips
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[[Image(tetra_site_controller_lucent_pcb_top.jpg, 50%)]]
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[[Image(tetra_site_controller_lucent_pcb_bottom.jpg, 50%)]]
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h3. PCI Ethernet card (10-Base-2)
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[[Image(tetra_site_controller_ethernet_pcb_top.jpg, 50%)]]
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h3. Clock card
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[[Image(tetra_site_controller_clock_pcb_top.jpg, 50%)]]
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[[Image(tetra_site_controller_clock_pcb_bottom.jpg, 50%)]]
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