TypicalCalypsoModemDesign » History » Version 7
laforge, 02/19/2016 10:49 PM
add pcb photo of C123
1 | 6 | laforge | = Typical Ti Calypso baseband modem design = |
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3 | 1 | laforge | This is the standard Ti Calypso-based modem design used in many phones, including the Compal-built Motorola C1xx phones and |
4 | 6 | laforge | also the Openmoko GTA01 (Neo1973) and GTA02 (FreeRunner) and possibly a number of other older FIC GSM products. |
5 | 1 | laforge | |
6 | 5 | laforge | It is a typically a dual- or tri-band GSM modem design with or without support for GPRS. |
7 | 1 | laforge | |
8 | 6 | laforge | == Block Schematic == |
9 | 2 | laforge | The block layout of this modem looks like this: |
10 | [[Image(calypso-block.png)]] |
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11 | 3 | laforge | |
12 | * Yellow: Clocks |
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13 | * Red: Digital Serial interfaces like SPI |
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14 | * Green: Analog I/Q differential baseband data |
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15 | * Magenta: RF signals |
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16 | 1 | laforge | * Blue: TSP, the time sequence port, sometimes parallel, sometimes serial |
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18 | 6 | laforge | == Circuit Description == |
19 | This is only a simplified version, ignoring the time constraints, sequencing of power-on/off events, AFC, AGC and APC. |
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20 | |||
21 | === GSM Rx Path === |
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22 | * the GSM signal from a BTS is picked up by the antenna |
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23 | * it reaches the Antenna Switch Module (ASM), typically a diode or MEMS switch |
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24 | * the Antenna Switch is configured to connect the antenna to one of the GSM/DCS/PCS Rx paths |
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25 | * the RF signal goes through Rx SAW filters to remove any out-of-band frequencies |
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26 | * the RF signal reaches the TRF6151/[wiki:Rita] zero-IF GSM Transceiver, where it is |
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27 | * amplified and further filtered |
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28 | * mixed with the frequency of the TRF6151-builtin VCO |
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29 | * exported as analog I/Q signals |
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30 | * The analog I/Q is input into the TWL3025/[wiki:Iota] ABB, where it is |
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31 | * sampled by an ADC |
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32 | * sent as serial stream of I+Q samples to the DBB via the BSP |
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33 | * In the DBB, the signal is |
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34 | * received on the RIF (Radio Inter Face) and DMA'ed into DSP API RAM |
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35 | 7 | laforge | * processed by the [wiki:Hardware/CalypsoDSP] DSP core inside the Calypso DBB |
36 | 6 | laforge | * converted into results (e.g. a MAC block) that is sent to the ARM via API RAM |
37 | * The ARM in the Calypso DBB then runs the GSM protocol stack |
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38 | |||
39 | === GSM Tx Path === |
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40 | * The ARM inside the Calypso DBB |
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41 | * generates some data (e.g. a MAC block) to be transmitted |
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42 | * writes this data plus associated commands in the API RAM |
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43 | * The DSP inside the Calypso DBB |
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44 | * executes this command during the next TDMA frame interrupt |
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45 | * performs forward error correction, interleaving, encryption (optional) |
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46 | * sends the GSM burst bits via the BSP to the ABB |
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47 | * The TWL3025/[wiki:Iota] ABB |
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48 | * receives burst bits via BSP and stores them in the burst buffer |
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49 | * runs those burst bits through a hardware GSMK modulator when triggered by BULENA on the TSP |
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50 | * outputs an Analog I/Q baseband GMSK signal to the TRF6151 |
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51 | * The TRF6151/[wiki:Rita] Transceiver |
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52 | * mixes the analog I/Q baseband signal with the VCO frequency |
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53 | * sends the resulting GSM-band frequency to the RF3166 |
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54 | * The RF3166 RF Power Amplififer |
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55 | * amplifies the signal according to the analog level of the APC |
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56 | * forwards the amplified signal to the Antenna Switch |
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57 | * The ASM4532 antenna switch |
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58 | * connects the PA output with the antenna for the duration of the burst |
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59 | |||
60 | == Glossary == |
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61 | 3 | laforge | * ABB: Analog Base Band |
62 | * AFC: Automatic Frequency Correction (tuning of the VTXCO by ABB) |
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63 | * APC: Automatic Power Correction (Tx Power envelope from ABB to PA) |
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64 | * BSP: Baseband Serial Port, like SPI |
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65 | 1 | laforge | * DBB: Digital Base Band, like SPI |
66 | 3 | laforge | * USP: uController Serial Port |
67 | 6 | laforge | * VCO: Voltage Controlled Oscillator |
68 | 3 | laforge | * RFCLK: A 26MHz master clock generated by the Transceiver |
69 | * CLK13M: 13MHz system clock provided by DBB |
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70 | 1 | laforge | * CLK32K: A 32.768kHz RTC clock signal |
71 | 7 | laforge | |
72 | == Actual implementation in Motorola C123 == |
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73 | |||
74 | [[Image(MotorolaC123:c123_pcb.jpg, 50%)]] |