IcE1usb » History » Version 20
laforge, 12/17/2020 05:59 PM
1 | 1 | tnt | h1. iCE40 E1 USB interface |
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3 | 15 | laforge | {{>toc}} |
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5 | 16 | laforge | !{width:20%}icE1usb-usb_side.jpg! |
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8 | 7 | laforge | This page is the main entry point for the (completed!) "Software defined" E1 USB interface using the iCE40 FPGA at its core. |
9 | 1 | tnt | |
10 | h2. Architecture |
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12 | 2 | laforge | This approach tries to implement as much as possible inside an iCE40 FPGA |
13 | 1 | tnt | |
14 | Particularly, the iCE40 FPGA |
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15 | 13 | tnt | * contains the E1 PHY. There is no external LIU*, reducing the BOM cost significantly. Instead, the comparators of the FPGA are used to detect RX positive / negative pulses and normal CMOS drivers to generate the TX pulses. In practice, this has shown to work reliably on short E1 links of a few meters. We'd expect some problems in terms of long-haul E1 links, but those are not really the target use case here. |
16 | 7 | laforge | * contains the E1 framer, including frame alignment, CRC4 verification/generation, ... |
17 | 2 | laforge | * contains a USB softcore (no external USB PHY needed) |
18 | 13 | tnt | * contains a PicoRV32 softcore to implement USB protocol handling and to connect the E1 softcore with the USB softcore |
19 | 2 | laforge | |
20 | So all-in-all, we can build a USB-E1 interface from little more than an iCE40 FPGA and an E1 line transformer! |
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22 | 11 | laforge | {{graphviz_link() |
23 | digraph G { |
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24 | rankdir = LR; |
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25 | 1 | tnt | |
26 | 12 | tnt | BTS -> XFRM [label="E1"]; |
27 | 11 | laforge | Linux [label="Linux\nOsmoBSC"]; |
28 | subgraph cluster_A { |
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29 | 1 | tnt | label = "iCE40 E1 USB Interface"; |
30 | 12 | tnt | XFRM [label="Magnetics"]; |
31 | XFRM -> Comparators [label="E1 (HDB3)"]; |
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32 | 11 | laforge | |
33 | subgraph cluster_B { |
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34 | label = "iCE40 FPGA"; |
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35 | Comparators; |
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36 | Framer [label="E1 Framer\nSoftcore"]; |
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37 | RISCV [label="RISCV\nSoftcore"]; |
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38 | USB [label="USB\nSoftcore"]; |
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39 | Comparators -> Framer [label="E1 (Serial Bits)"]; |
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40 | Framer -> RISCV; |
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41 | RISCV -> USB; |
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42 | } |
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43 | } |
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44 | USB -> Linux [label="Frame-aligned raw\nbits over USB"]; |
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45 | } |
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46 | }} |
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47 | 10 | laforge | |
48 | 1 | tnt | h2. Current stack |
49 | 9 | laforge | |
50 | 13 | tnt | * The hardware for the first production version is documented in the https://git.osmocom.org/osmo-e1-hardware |
51 | * The fpga gateware and associated embedded firmware is hosted in the same git repository. Some parts are in submodules (be sure to use recursive clone) |
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52 | 2 | laforge | * The userspace daemon that handles the USB communication is hosted at: https://git.osmocom.org/osmo-e1d |
53 | 5 | laforge | * The support for this daemon interface to the rest of the cellular stack is merged in mainline [[libosmo-abis:]]. Make sure you build it with @--enable-e1d@, though. |
54 | 15 | laforge | |
55 | h2. Availability |
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56 | |||
57 | The fully assembled and tested icE1usb hardware is sold by "sysmocom":https://sysmocom.de/ ("product page":https://www.sysmocom.de/products/lab/icE1usb, "data sheet":https://www.sysmocom.de/downloads/icE1_data_sheet.pdf) an can be purchased from the "webshop":http://shop.sysmocom.de/products/icE1usb - hobbyist/community discounts are available. |
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58 | 1 | tnt | |
59 | h2. Presentations |
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60 | |||
61 | * Talk from OsmoCon 2018 about the Software Defined E1 project as a whole : attachment:osmocon_2018_e1.pdf |
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62 | * Talk from OsmoDevCon 2019 about the iCE40 based solution specifically: attachment:osmodevcon_2019_e1.pdf |
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63 | 7 | laforge | * "video recording of the iC40 based approach / OsmoDevCon 2019":https://media.ccc.de/v/osmodevcon2019-97-software-defined-e1 |
64 | 1 | tnt | |
65 | 20 | laforge | h2. User Manual |
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67 | * https://ftp.osmocom.org/docs/latest/icE1usb-usermanual.pdf |
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68 | |||
69 | 1 | tnt | h2. Status |
70 | |||
71 | h3. Hardware |
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72 | |||
73 | 13 | tnt | * First proof of concept was done in 2018, based on manually wired protoboard to prove viability of the USB and E1 interface. |
74 | * Several hand-wired pre-production prototypes based on iCEbreaker and iCEbreaker-bitsy have been assembled and used successfully from late 2018 to early 2020 |
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75 | 18 | laforge | * A fully integrated single-board design with two E1 lines and a GPS-DO for E1 clock stability has been created by @tnt in August 2020. After a couple of prototypes were built and tested, a first production run was made |
76 | * fully tested v1.0 units are available since November 2020 through the sysmocom shop. |
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77 | 1 | tnt | |
78 | 19 | laforge | h3. Firmware / Gateware |
79 | 1 | tnt | |
80 | The full stack from gateware through firmware and host software has been tested and used in a variety of scenarios. |
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81 | |||
82 | * gateware for the FPGA and firmware for the RISC-V softcore is available from https://git.osmocom.org/osmo-e1-hardware and is buildable using the icestorm OSS toolchain |
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83 | * The host software/driver is part of [[osmo-e1d:]], see the proejct page for related details. [[libosmo-abis:]] has been extended with [[osmo-e1d:]] support. |
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84 | 18 | laforge | |
85 | Major missing features at this time (December 2020): |
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86 | * no firmware support for the second line/port yet: #4914 |
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87 | * no firmware support for the GPS-DO peripheral yet: #4672, #4673 |
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88 | * osmo-e1d doesn't re-attach to the USB device after disconnect/reconnect: |
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89 | * no reporting of alignment status via E1 port LEDs: |
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90 | * no reporting of errors (CRC, alignment) via USB to osmo-e1d: #4674 |
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91 | * Rx/Tx framer operation not yet configurable (always uses CRC4): #4675 |
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92 | 1 | tnt | |
93 | h2. Credits |
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94 | |||
95 | The development of FPGA softcores, firmware, PCB schematics, PCB layout and osmo-e1d was done by Sylvain Munaut (@tnt). |
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96 | 17 | laforge | |
97 | h2. Hardware pictures |
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98 | |||
99 | h3. Early Proof-of-Concept and Prototypes |
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100 | |||
101 | !{width:45%}proto_poc.jpg! |
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102 | !{width:45%}ice40-e1.jpg! |
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103 | |||
104 | h3. Pre-production Prototype |
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105 | |||
106 | !{width:50%}osmo-e1-ice40.jpg! |
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107 | |||
108 | h3. Rev 1.0 production |
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109 | |||
110 | !{width:45%}prod_pcb.jpg! |
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111 | !{width:45%}prod_batch.jpg! |