AS5400 Bootlog » History » Version 3
laforge, 04/30/2022 02:46 PM
1 | 1 | laforge | h1. AS5400 Bootlog |
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2 | |||
3 | <pre> |
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4 | System Bootstrap, Version 12.4(22r)T, RELEASE SOFTWARE (fc1) |
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5 | Technical Support: http://www.cisco.com/techsupport |
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6 | Copyright (c) 2008 by cisco Systems, Inc. |
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7 | AS5400XM platform with 524288 Kbytes of main memory |
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8 | |||
9 | Self decompressing the image : ############################################################################################################################################################################## [OK] |
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10 | |||
11 | Restricted Rights Legend |
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12 | |||
13 | Use, duplication, or disclosure by the Government is |
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14 | subject to restrictions as set forth in subparagraph |
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15 | (c) of the Commercial Computer Software - Restricted |
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16 | Rights clause at FAR sec. 52.227-19 and subparagraph |
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17 | (c) (1) (ii) of the Rights in Technical Data and Computer |
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18 | Software clause at DFARS sec. 252.227-7013. |
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19 | |||
20 | cisco Systems, Inc. |
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21 | 170 West Tasman Drive |
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22 | San Jose, California 95134-1706 |
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23 | |||
24 | |||
25 | |||
26 | Cisco IOS Software, 5400 Software (C5400-IK9SU2-M), Version 12.4(22)T4, RELEASE SOFTWARE (fc2) |
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27 | Technical Support: http://www.cisco.com/techsupport |
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28 | Copyright (c) 1986-2009 by Cisco Systems, Inc. |
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29 | Compiled Tue 15-Dec-09 01:47 by prod_rel_team |
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30 | 2 | laforge | |
31 | |||
32 | This product contains cryptographic features and is subject to United |
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33 | States and local country laws governing import, export, transfer and |
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34 | use. Delivery of Cisco cryptographic products does not imply |
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35 | third-party authority to import, export, distribute or use encryption. |
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36 | Importers, exporters, distributors and users are responsible for |
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37 | compliance with U.S. and local country laws. By using this product you |
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38 | agree to comply with applicable laws and regulations. If you are unable |
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39 | to comply with U.S. and local laws, return this product immediately. |
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40 | |||
41 | A summary of U.S. laws governing Cisco cryptographic products may be found at: |
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42 | http://www.cisco.com/wwl/export/crypto/tool/stqrg.html |
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43 | |||
44 | If you require further assistance please contact us by sending email to |
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45 | export@cisco.com. |
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46 | |||
47 | Cisco AS5400XM (BCM) processor (revision 0x22) with 393215K/131072K bytes of memory. |
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48 | Processor board ID JAE1237UMWQ |
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49 | SB-1 CPU at 750MHz, Implementation 1025, Rev 0.3, 256KB L2 Cache |
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50 | Last reset from power-on |
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51 | Manufacture Cookie Info: |
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52 | EEPROM Version 0x4, Board ID 0x4BD, |
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53 | Board Hardware Version 2.7, Item Number 800-6572035-03, |
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54 | Board Revision K0, Serial Number JAE1237UMWQ. |
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55 | Processor 0x0, MAC Address 0022.9158.07e6 |
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56 | 2 Gigabit Ethernet interfaces |
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57 | 10 Serial interfaces |
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58 | 492 terminal lines |
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59 | 16 Channelized/Clear E1/PRI ports |
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60 | 512K bytes of NVRAM. |
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61 | 126976K bytes of ATA External CompactFlash (Read/Write) |
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62 | Range must start with interface Async 1 or higher. |
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63 | NLS timeout set to 1 |
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64 | Control Relationship ID set to 1 |
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65 | |||
66 | |||
67 | |||
68 | Press RETURN to get started! |
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69 | |||
70 | 1 | laforge | </pre> |
71 | 3 | laforge | |
72 | h2. show s5400 |
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73 | |||
74 | <pre> |
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75 | Router>show as5400 |
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76 | Hardware Info: |
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77 | System I/O Controller PLD version: 0x8 |
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78 | Serial Interface Controller PLD version: 0x2 |
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79 | |||
80 | Memory Info: |
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81 | Memory Installed: 512 MB |
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82 | Memory Type is : DDR |
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83 | |||
84 | Bus Watcher Counters |
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85 | cor_l2cache_data_ecc_count = 0 |
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86 | bad_l2cache_data_ecc_count = 0 |
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87 | cor_l2cache_tag_ecc_count = 0 |
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88 | bad_l2cache_tag_ecc_count = 0 |
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89 | cor_memory_data_ecc_count = 0 |
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90 | bad_memory_data_ecc_count = 0 |
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91 | bus_errors = 0 |
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92 | |||
93 | System Controller Network Interrupts: |
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94 | Interrupt Register is at 0xB0020040 (0x0000008000000000) |
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95 | BCM interrupt mask 0xFF7C03BEFFE0FCC2 |
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96 | |||
97 | Registered Interrupts: |
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98 | Level Mask Count Data Interrupt Handler |
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99 | 0 0x0000000100000000 0 0x00000000 0x6035020C (GT96124 Interrupt handler) |
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100 | 0 0x0000000000100000 0 0x65E6CCE4 0x603383A4 (GigabitEthernet0/1) |
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101 | 0 0x0000000000080000 0 0x65E3A2D8 0x603383A4 (GigabitEthernet0/0) |
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102 | 0 0x0000040000000000 18079 0x00000000 0x60834FE8 (Low IRQ interrupt) |
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103 | 1 0x0000100000000000 0 0x00000000 0x600758FC (BCM1125 GPIO12 - BITS IRQ interrupt) |
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104 | 1 0x0000000000000020 0 0x64E3F568 0x60844F94 (SB1125 Timer 3) |
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105 | 1 0x0000000000000010 0 0x64E3F4A0 0x60844F94 (SB1125 Timer 2) |
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106 | 1 0x0000000000000008 0 0x64E3F3D8 0x60844F94 (SB1125 Timer 1) |
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107 | 1 0x0000000000000004 0 0x64E3F310 0x60844F94 (SB1125 Timer 0) |
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108 | 1 0x0000080000000000 18502 0x00000000 0x608352BC (High IRQ interrupt) |
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109 | 3 0x0000800000000000 0 0x00000000 0x60364798 (OIR Interrupt) |
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110 | 4 0x0000400000000000 0 0x00000000 0x6083D6B4 (NRBUS Parity Error) |
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111 | 4 0x0000200000000000 0 0x00000000 0x6083D6B4 (IO Error) |
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112 | 4 0x0000004000000000 0 0x00000000 0x6083D6B4 (IO_BUS_Parity Error) |
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113 | 4 0x007C00000000E0C2 0 0x00000000 0x608434B8 (Spurious Intr ERROR Handler) |
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114 | 4 0x0000000000020000 0 0x00000000 0x60843EF0 (Corrected ECC Error Handler) |
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115 | 4 0x0000000000010000 0 0x00000000 0x60842F5C (Bad ECC Error Handler) |
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116 | 4 0x0003000000000000 0 0x63BFD93C 0x6084302C (BCM1125 Host LDT Bridge Error Handler) |
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117 | 4 0x0000000000040000 0 0x00000000 0x608432E4 (BCM1125 IO-Bus Error Handler) |
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118 | 4 0x0080000000000000 0 0x00000000 0x608430B4 (BCM1125 Host PCI Bridge Error Handler) |
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119 | 6 0x0000000000000001 0 0x00000000 0x608434B8 (Watchdog Timer 0 Handler) |
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120 | |||
121 | HT 600MHz Retry Count 0 |
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122 | BCM1125H HT Host Bridge, handle=0 |
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123 | BCM bridge, config=0x0 |
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124 | (0x00):dev, vendor id = 0x0002166D |
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125 | (0x04):status, command = 0x00100107 |
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126 | (0x08):class code, revid = 0x06000003 |
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127 | (0x0C):hdr, lat timer, cls = 0x00010000 |
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128 | (0x18):bus id registers = 0x001B0100 |
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129 | (0x1C):secondary status = 0x00000141 |
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130 | (0x20):mem base/limit = 0x5FF04300 |
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131 | (0x30):io upper limit/base = 0x00010001 |
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132 | (0x34):capabilities ptr = 0x00000040 |
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133 | (0x38):expansion rom bar = 0x00000000 |
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134 | (0x3C):bridge ctrl = 0x00020000 |
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135 | (0x40):LDT cmd, cap id, = 0x20000008 |
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136 | (0x44):Link config/control = 0x00000020 |
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137 | (0x48):Link frequency = 0x801F0423 |
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138 | (0x50):SRIcmd, srirxden, sritxden = 0x50211010 |
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139 | (0x54):SRI tx numerator = 0x0000FFFF |
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140 | (0x58):SRI rx numerator = 0x0000FFFF |
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141 | (0x68):Error status/control = 0x00009A49 |
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142 | (0x6C):Tx ctrl, databufalloc = 0x00041515 |
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143 | (0xC8):Tx buffer count max = 0x00FFFFFF |
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144 | (0xDC):Rx CRC expected = 0x9AA36237 |
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145 | (0xF0):Rx CRC received = 0xCB7B9FDF |
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146 | |||
147 | BCM PCI Host Bridge: |
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148 | bus_no=0, device_no=0 |
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149 | DeviceID=0x0001, VendorID=0x166D, Cmd=0x0146, Status=0x02A0 |
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150 | Cls=0x06/0x00/0x00, Rev=0x03, LatencyTimer=0x2C, CacheLineSize=0x10 |
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151 | BaseAddr0=0x60000008, BaseAddr1=0x00000000, MaxLat=0x00, MinGnt=0x00 |
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152 | SubsysDeviceID=0x0000, SubsysVendorID=0xFFFF, ErrorAddr=0x00030400 |
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153 | Additional Status = 0x00000020 |
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154 | |||
155 | PLX HT2PCI Bridge A for PCM Tracer & DFC 2,4,6, handle=0 |
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156 | PLX HT7520 bridge, config=0x0 |
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157 | (0x00):dev, vendor id = 0x74501022 |
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158 | (0x04):status, command = 0x02300107 |
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159 | (0x08):class code, revid = 0x06040012 |
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160 | (0x0C):hdr, lat timer, cls = 0x00810000 |
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161 | (0x18):bus id registers = 0xF80E0201 |
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162 | (0x1C):secondary status = 0x02200141 |
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163 | (0x20):mem base/limit = 0x4FF04300 |
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164 | (0x30):io upper limit/base = 0x00010001 |
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165 | (0x34):capabilities ptr = 0x000000A0 |
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166 | (0x3C):bridge ctrl = 0x00020000 |
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167 | (0x40):miscellaneous = 0x000F0004 |
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168 | (0x4C):prefetch ctrl = 0x00000446 |
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169 | (0xC0):ht cmd, cap id = 0x00410008 |
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170 | (0xC4):link cfg/ctrl side a = 0x00112020 |
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171 | (0xC8):link cfg/ctrl side b = 0x770020D0 |
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172 | (0xCC):link freq ctrl side a = 0x00350422 |
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173 | (0xD0):link freq ctrl side b = 0x00350402 |
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174 | |||
175 | PLX HT2PCI Bridge B, for DFC 1,3,5,7 |
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176 | (0x00):dev, vendor id = 0x74501022 |
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177 | (0x04):status, command = 0x02300107 |
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178 | (0x08):class code, revid = 0x06040012 |
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179 | (0x0C):hdr, lat timer, cls = 0x00810000 |
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180 | (0x18):bus id registers = 0xF81B0F01 |
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181 | (0x1C):secondary status = 0x022001A1 |
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182 | (0x20):mem base/limit = 0x5FF05000 |
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183 | (0x30):io upper limit/base = 0x00010001 |
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184 | (0x34):capabilities ptr = 0x000000A0 |
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185 | (0x3C):bridge ctrl = 0x00020000 |
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186 | (0x40):miscellaneous = 0x000F0004 |
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187 | (0x4C):prefetch ctrl = 0x00000446 |
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188 | |||
189 | DFC1 PCI2PCI Bridge, Handle=0 |
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190 | PERICOM bridge chip, Primary Bus 15, Secondary Bus 16,config=0x0 |
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191 | (0x00):dev, vendor id = 0x815012D8 |
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192 | (0x04):status, command = 0x02B00107 |
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193 | (0x08):class code, revid = 0x06040004 |
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194 | (0x0C):hdr, lat timer, cls = 0x0001FF08 |
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195 | (0x18):sec lat,cls & bus no = 0x1812100F |
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196 | (0x1C):sec status, io base = 0x02A00101 |
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197 | (0x20):mem base & limit = 0x53F05000 |
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198 | (0x24):prefetch membase/lim = 0x00015001 |
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199 | (0x30):io base/lim upper16 = 0x00000000 |
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200 | (0x3C):bridge ctrl = 0x01000000 |
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201 | (0x40):arb/serr, chip ctrl = 0x03F00000 |
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202 | (0x44):pri/sec trgt wait t. = 0x00000000 |
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203 | (0x48):sec write attmp ctr = 0x00000000 |
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204 | (0x4C):pri write attmp ctr = 0x70003A98 |
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205 | (0x64):serr disable, gpio = 0xF0000010 |
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206 | (0x68):sec clk ctrl,serrsta = 0x00003FC0 |
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207 | |||
208 | DFC2 PCI2PCI Bridge, Handle=0 |
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209 | PERICOM bridge chip, Primary Bus 2, Secondary Bus 6,config=0x0 |
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210 | (0x00):dev, vendor id = 0x815012D8 |
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211 | (0x04):status, command = 0x02B00107 |
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212 | (0x08):class code, revid = 0x06040004 |
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213 | (0x0C):hdr, lat timer, cls = 0x0001FF08 |
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214 | (0x18):sec lat,cls & bus no = 0x18080602 |
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215 | (0x1C):sec status, io base = 0x02A00101 |
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216 | (0x20):mem base & limit = 0x47F04400 |
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217 | (0x24):prefetch membase/lim = 0x00014401 |
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218 | (0x30):io base/lim upper16 = 0x00000000 |
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219 | (0x3C):bridge ctrl = 0x01000000 |
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220 | (0x40):arb/serr, chip ctrl = 0x03F00000 |
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221 | (0x44):pri/sec trgt wait t. = 0x00000000 |
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222 | (0x48):sec write attmp ctr = 0x00000000 |
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223 | (0x4C):pri write attmp ctr = 0x70003A98 |
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224 | (0x64):serr disable, gpio = 0xF0000010 |
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225 | (0x68):sec clk ctrl,serrsta = 0x00003FC0 |
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226 | |||
227 | DFC3 PCI2PCI Bridge, Handle=0 |
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228 | PERICOM bridge chip, Primary Bus 15, Secondary Bus 19,config=0x0 |
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229 | (0x00):dev, vendor id = 0x815012D8 |
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230 | (0x04):status, command = 0x02B00107 |
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231 | (0x08):class code, revid = 0x06040004 |
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232 | (0x0C):hdr, lat timer, cls = 0x0001FF08 |
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233 | (0x18):sec lat,cls & bus no = 0x1815130F |
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234 | (0x1C):sec status, io base = 0x02A00101 |
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235 | (0x20):mem base & limit = 0x57F05400 |
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236 | (0x24):prefetch membase/lim = 0x00015401 |
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237 | (0x30):io base/lim upper16 = 0x00000000 |
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238 | (0x3C):bridge ctrl = 0x01000000 |
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239 | (0x40):arb/serr, chip ctrl = 0x03F00000 |
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240 | (0x44):pri/sec trgt wait t. = 0x00000000 |
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241 | (0x48):sec write attmp ctr = 0x00000000 |
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242 | (0x4C):pri write attmp ctr = 0x70003A98 |
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243 | (0x64):serr disable, gpio = 0xF0000010 |
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244 | (0x68):sec clk ctrl,serrsta = 0x00003FC0 |
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245 | |||
246 | DFC4 PCI2PCI Bridge, Handle=0 |
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247 | PERICOM bridge chip, Primary Bus 2, Secondary Bus 9,config=0x0 |
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248 | (0x00):dev, vendor id = 0x815012D8 |
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249 | (0x04):status, command = 0x02B00107 |
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250 | (0x08):class code, revid = 0x06040004 |
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251 | (0x0C):hdr, lat timer, cls = 0x0001FF08 |
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252 | (0x18):sec lat,cls & bus no = 0x180B0902 |
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253 | (0x1C):sec status, io base = 0x02A00101 |
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254 | (0x20):mem base & limit = 0x4BF04800 |
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255 | (0x24):prefetch membase/lim = 0x00014801 |
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256 | (0x30):io base/lim upper16 = 0x00000000 |
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257 | (0x3C):bridge ctrl = 0x01000000 |
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258 | (0x40):arb/serr, chip ctrl = 0x03F00000 |
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259 | (0x44):pri/sec trgt wait t. = 0x00000000 |
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260 | (0x48):sec write attmp ctr = 0x00000000 |
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261 | (0x4C):pri write attmp ctr = 0x70003A98 |
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262 | (0x64):serr disable, gpio = 0xF0000010 |
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263 | (0x68):sec clk ctrl,serrsta = 0x00003FC0 |
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264 | |||
265 | DFC5 PCI2PCI Bridge, Handle=0 |
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266 | PERICOM bridge chip, Primary Bus 15, Secondary Bus 22,config=0x0 |
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267 | (0x00):dev, vendor id = 0x815012D8 |
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268 | (0x04):status, command = 0x02B00107 |
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269 | (0x08):class code, revid = 0x06040004 |
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270 | (0x0C):hdr, lat timer, cls = 0x0001FF08 |
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271 | (0x18):sec lat,cls & bus no = 0x1818160F |
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272 | (0x1C):sec status, io base = 0x02A00101 |
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273 | (0x20):mem base & limit = 0x5BF05800 |
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274 | (0x24):prefetch membase/lim = 0x00015801 |
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275 | (0x30):io base/lim upper16 = 0x00000000 |
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276 | (0x3C):bridge ctrl = 0x01000000 |
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277 | (0x40):arb/serr, chip ctrl = 0x03F00000 |
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278 | (0x44):pri/sec trgt wait t. = 0x00000000 |
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279 | (0x48):sec write attmp ctr = 0x00000000 |
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280 | (0x4C):pri write attmp ctr = 0x70003A98 |
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281 | (0x64):serr disable, gpio = 0xF0000010 |
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282 | (0x68):sec clk ctrl,serrsta = 0x00003FC0 |
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283 | |||
284 | DFC6 PCI2PCI Bridge, Handle=0 |
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285 | PERICOM bridge chip, Primary Bus 2, Secondary Bus 12,config=0x0 |
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286 | (0x00):dev, vendor id = 0x815012D8 |
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287 | (0x04):status, command = 0x02B00107 |
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288 | (0x08):class code, revid = 0x06040004 |
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289 | (0x0C):hdr, lat timer, cls = 0x0001FF08 |
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290 | (0x18):sec lat,cls & bus no = 0x180E0C02 |
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291 | (0x1C):sec status, io base = 0x02A00101 |
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292 | (0x20):mem base & limit = 0x4FF04C00 |
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293 | (0x24):prefetch membase/lim = 0x00014C01 |
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294 | (0x30):io base/lim upper16 = 0x00000000 |
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295 | (0x3C):bridge ctrl = 0x01000000 |
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296 | (0x40):arb/serr, chip ctrl = 0x03F00000 |
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297 | (0x44):pri/sec trgt wait t. = 0x00000000 |
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298 | (0x48):sec write attmp ctr = 0x00000000 |
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299 | (0x4C):pri write attmp ctr = 0x70003A98 |
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300 | (0x64):serr disable, gpio = 0xF0000010 |
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301 | (0x68):sec clk ctrl,serrsta = 0x00003FC0 |
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302 | |||
303 | DFC7 PCI2PCI Bridge, Handle=0 |
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304 | PERICOM bridge chip, Primary Bus 15, Secondary Bus 25,config=0x0 |
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305 | (0x00):dev, vendor id = 0x815012D8 |
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306 | (0x04):status, command = 0x02B00107 |
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307 | (0x08):class code, revid = 0x06040004 |
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308 | (0x0C):hdr, lat timer, cls = 0x0001FF08 |
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309 | (0x18):sec lat,cls & bus no = 0x181B190F |
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310 | (0x1C):sec status, io base = 0x02A00101 |
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311 | (0x20):mem base & limit = 0x5FF05C00 |
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312 | (0x24):prefetch membase/lim = 0x00015C01 |
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313 | (0x30):io base/lim upper16 = 0x00000000 |
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314 | (0x3C):bridge ctrl = 0x01000000 |
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315 | (0x40):arb/serr, chip ctrl = 0x03F00000 |
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316 | (0x44):pri/sec trgt wait t. = 0x00000000 |
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317 | (0x48):sec write attmp ctr = 0x00000000 |
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318 | (0x4C):pri write attmp ctr = 0x70003A98 |
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319 | (0x64):serr disable, gpio = 0xF0000010 |
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320 | (0x68):sec clk ctrl,serrsta = 0x00003FC0 |
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321 | |||
322 | GT 96124 PCI Registers: |
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323 | (0x00):dev, vendor id = 0x967A11AB |
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324 | (0x04):status, command = 0x02A00007 |
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325 | (0x0C):hdr, lat timer, cls = 0x0000F800 |
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326 | (0x20):internal regs mem-maped bar = 0x41000000 |
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327 | (0x24):internal regs io-maped bar = 0x00000001 |
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328 | |||
329 | Interrupt Registers: |
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330 | Interrupt Enable Register 0xFDC0 |
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331 | Interrupt Clear Register 0xF800 |
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332 | Interrupt Pending Register 0xFFC0 |
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333 | Interrupt High IRQ Register 0xF8 |
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334 | Interrupt Low IRQ Register 0xF8 |
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335 | Network I/O Interrupt Throttling: |
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336 | throttle count=0, timer count=0 |
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337 | active=0, configured=1 |
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338 | netint usec=10000, netint mask usec=400 |
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339 | |||
340 | CPU Registers: |
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341 | Processor Revision ID : 0x40103 |
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342 | Configuration : 0x8000C08B |
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343 | Status : 0x3400FF01 |
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344 | Cause : 0x0 |
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345 | Count : 0x605B4D12 |
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346 | Compare : 0x6073EA5D |
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347 | TLB Entries: |
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348 | |||
349 | Abbreviation: c: cacheable, nc: non-coherent, wt: write through |
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350 | wa: write allocate, wb: write back |
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351 | |||
352 | Index VPN2 ASID D V G Mask Size |
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353 | PFN(E) PFN(O) Cache |
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354 | VADDR PADDR(E) PADDR(O) |
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355 | 0 0x20000 0x0 1 1 1 0xFF (1024 Kbytes) |
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356 | 0x20000 0x20100 uncached |
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357 | 0x40000000 0x20000000 0x20100000 |
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358 | 1 0x20100 0x0 1 1 1 0xFF (1024 Kbytes) |
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359 | 0x20200 0x20300 uncached |
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360 | 0x40200000 0x20200000 0x20300000 |
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361 | 2 0x8800 0x0 1 1 1 0xFF (1024 Kbytes) |
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362 | 0x41000 0x41100 uncached |
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363 | 0x11000000 0x41000000 0x41100000 |
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364 | 3 0x8900 0x0 1 1 1 0xFF (1024 Kbytes) |
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365 | 0xDC000 0xDC100 uncached |
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366 | 0x11200000 0xDC000000 0xDC100000 |
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367 | 4 0x8A00 0x0 1 1 1 0xFF (1024 Kbytes) |
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368 | 0x61400 0x61500 uncached |
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369 | 0x11400000 0x61400000 0x61500000 |
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370 | 5 0x8B00 0x0 1 1 1 0xFF (1024 Kbytes) |
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371 | 0x61600 0x61700 uncached |
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372 | 0x11600000 0x61600000 0x61700000 |
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373 | 6 0x8C00 0x0 1 1 1 0x3FF (4096 Kbytes) |
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374 | 0x61800 0x61C00 uncached |
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375 | 0x11800000 0x61800000 0x61C00000 |
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376 | 7 0x9000 0x0 1 1 1 0x3FF (4096 Kbytes) |
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377 | 0x62000 0x62400 uncached |
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378 | 0x12000000 0x62000000 0x62400000 |
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379 | 8 0x9400 0x0 1 1 1 0x3FF (4096 Kbytes) |
||
380 | 0x62800 0x62C00 uncached |
||
381 | 0x12800000 0x62800000 0x62C00000 |
||
382 | 9 0x9800 0x0 1 1 1 0x3FF (4096 Kbytes) |
||
383 | 0x63000 0x63400 uncached |
||
384 | 0x13000000 0x63000000 0x63400000 |
||
385 | 10 0x9C00 0x0 1 1 1 0x3FF (4096 Kbytes) |
||
386 | 0x63800 0x63C00 uncached |
||
387 | 0x13800000 0x63800000 0x63C00000 |
||
388 | 11 0x18000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
389 | 0x70000 0x71000 uncached |
||
390 | 0x30000000 0x70000000 0x71000000 |
||
391 | 12 0x19000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
392 | 0x72000 0x73000 uncached |
||
393 | 0x32000000 0x72000000 0x73000000 |
||
394 | 13 0xA000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
395 | 0x64000 0x65000 uncached |
||
396 | 0x14000000 0x64000000 0x65000000 |
||
397 | 14 0xB000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
398 | 0x66000 0x67000 uncached |
||
399 | 0x16000000 0x66000000 0x67000000 |
||
400 | 15 0x1A000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
401 | 0x74000 0x75000 uncached |
||
402 | 0x34000000 0x74000000 0x75000000 |
||
403 | 16 0x1B000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
404 | 0x76000 0x77000 uncached |
||
405 | 0x36000000 0x76000000 0x77000000 |
||
406 | 17 0xC000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
407 | 0x68000 0x69000 uncached |
||
408 | 0x18000000 0x68000000 0x69000000 |
||
409 | 18 0xD000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
410 | 0x6A000 0x6B000 uncached |
||
411 | 0x1A000000 0x6A000000 0x6B000000 |
||
412 | 19 0x1C000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
413 | 0x78000 0x79000 uncached |
||
414 | 0x38000000 0x78000000 0x79000000 |
||
415 | 20 0x1D000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
416 | 0x7A000 0x7B000 uncached |
||
417 | 0x3A000000 0x7A000000 0x7B000000 |
||
418 | 21 0xE000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
419 | 0x6C000 0x6D000 uncached |
||
420 | 0x1C000000 0x6C000000 0x6D000000 |
||
421 | 22 0xF000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
422 | 0x6E000 0x6F000 uncached |
||
423 | 0x1E000000 0x6E000000 0x6F000000 |
||
424 | 23 0x1E000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
425 | 0x7C000 0x7D000 uncached |
||
426 | 0x3C000000 0x7C000000 0x7D000000 |
||
427 | 24 0x1F000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
428 | 0x7E000 0x7F000 uncached |
||
429 | 0x3E000000 0x7E000000 0x7F000000 |
||
430 | 25 0x30000 0x0 0 1 1 0xFFF (16384 Kbytes) |
||
431 | 0x0 0x1000 coherent excl. on write |
||
432 | 0x60000000 0x0 0x1000000 |
||
433 | 26 0x31000 0x0 0 1 1 0x3FF (4096 Kbytes) |
||
434 | 0x2000 0x2400 coherent excl. on write |
||
435 | 0x62000000 0x2000000 0x2400000 |
||
436 | 27 0x31400 0x0 0 1 1 0xFF (1024 Kbytes) |
||
437 | 0x2800 0x2900 coherent excl. on write |
||
438 | 0x62800000 0x2800000 0x2900000 |
||
439 | 28 0x31500 0x0 0 1 1 0xFF (1024 Kbytes) |
||
440 | 0x2A00 0x2B00 coherent excl. on write |
||
441 | 0x62A00000 0x2A00000 0x2B00000 |
||
442 | 29 0x31600 0x0 1 1 1 0xFF (1024 Kbytes) |
||
443 | 0x2C00 0x2D00 coherent excl. on write |
||
444 | 0x62C00000 0x2C00000 0x2D00000 |
||
445 | 30 0x31700 0x0 1 1 1 0xFF (1024 Kbytes) |
||
446 | 0x2E00 0x2F00 coherent excl. on write |
||
447 | 0x62E00000 0x2E00000 0x2F00000 |
||
448 | 31 0x31800 0x0 1 1 1 0x3FF (4096 Kbytes) |
||
449 | 0x3000 0x3400 coherent excl. on write |
||
450 | 0x63000000 0x3000000 0x3400000 |
||
451 | 32 0x31C00 0x0 1 1 1 0x3FF (4096 Kbytes) |
||
452 | 0x3800 0x3C00 coherent excl. on write |
||
453 | 0x63800000 0x3800000 0x3C00000 |
||
454 | 33 0x32000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
455 | 0x4000 0x5000 coherent excl. on write |
||
456 | 0x64000000 0x4000000 0x5000000 |
||
457 | 34 0x33000 0x0 1 1 1 0xFFF (16384 Kbytes) |
||
458 | 0x6000 0x7000 coherent excl. on write |
||
459 | 0x66000000 0x6000000 0x7000000 |
||
460 | 35 0x10000 0x0 1 1 1 0x3FFF (65536 Kbytes) |
||
461 | 0x8000 0xC000 coherent excl. on write |
||
462 | 0x20000000 0x8000000 0xC000000 |
||
463 | 36 0x34000 0x0 1 1 1 0x3FFF (65536 Kbytes) |
||
464 | 0x80000 0x84000 coherent excl. on write |
||
465 | 0x68000000 0x80000000 0x84000000 |
||
466 | 37 0x38000 0x0 1 1 1 0x3FFF (65536 Kbytes) |
||
467 | 0x88000 0x8C000 coherent excl. on write |
||
468 | 0x70000000 0x88000000 0x8C000000 |
||
469 | 38 0x0 0xA6 0 0 0 0x0 (4 Kbytes) |
||
470 | 0x0 0x0 uncached |
||
471 | 0x0 0x0 0x0 |
||
472 | 39 0x0 0xA7 0 0 0 0x0 (4 Kbytes) |
||
473 | 0x0 0x0 uncached |
||
474 | 0x0 0x0 0x0 |
||
475 | 40 0x0 0xA8 0 0 0 0x0 (4 Kbytes) |
||
476 | 0x0 0x0 uncached |
||
477 | 0x0 0x0 0x0 |
||
478 | 41 0x0 0xA9 0 0 0 0x0 (4 Kbytes) |
||
479 | 0x0 0x0 uncached |
||
480 | 0x0 0x0 0x0 |
||
481 | 42 0x0 0xAA 0 0 0 0x0 (4 Kbytes) |
||
482 | 0x0 0x0 uncached |
||
483 | 0x0 0x0 0x0 |
||
484 | 43 0x0 0xAB 0 0 0 0x0 (4 Kbytes) |
||
485 | 0x0 0x0 uncached |
||
486 | 0x0 0x0 0x0 |
||
487 | 44 0x0 0xAC 0 0 0 0x0 (4 Kbytes) |
||
488 | 0x0 0x0 uncached |
||
489 | 0x0 0x0 0x0 |
||
490 | 45 0x0 0xAD 0 0 0 0x0 (4 Kbytes) |
||
491 | 0x0 0x0 uncached |
||
492 | 0x0 0x0 0x0 |
||
493 | 46 0x0 0xAE 0 0 0 0x0 (4 Kbytes) |
||
494 | 0x0 0x0 uncached |
||
495 | 0x0 0x0 0x0 |
||
496 | 47 0x0 0xAF 0 0 0 0x0 (4 Kbytes) |
||
497 | 0x0 0x0 uncached |
||
498 | 0x0 0x0 0x0 |
||
499 | 48 0x0 0xB0 0 0 0 0x0 (4 Kbytes) |
||
500 | 0x0 0x0 uncached |
||
501 | 0x0 0x0 0x0 |
||
502 | 49 0x0 0xB1 0 0 0 0x0 (4 Kbytes) |
||
503 | 0x0 0x0 uncached |
||
504 | 0x0 0x0 0x0 |
||
505 | 50 0x0 0xB2 0 0 0 0x0 (4 Kbytes) |
||
506 | 0x0 0x0 uncached |
||
507 | 0x0 0x0 0x0 |
||
508 | 51 0x0 0xB3 0 0 0 0x0 (4 Kbytes) |
||
509 | 0x0 0x0 uncached |
||
510 | 0x0 0x0 0x0 |
||
511 | 52 0x0 0xB4 0 0 0 0x0 (4 Kbytes) |
||
512 | 0x0 0x0 uncached |
||
513 | 0x0 0x0 0x0 |
||
514 | 53 0x0 0xB5 0 0 0 0x0 (4 Kbytes) |
||
515 | 0x0 0x0 uncached |
||
516 | 0x0 0x0 0x0 |
||
517 | 54 0x0 0xB6 0 0 0 0x0 (4 Kbytes) |
||
518 | 0x0 0x0 uncached |
||
519 | 0x0 0x0 0x0 |
||
520 | 55 0x0 0xB7 0 0 0 0x0 (4 Kbytes) |
||
521 | 0x0 0x0 uncached |
||
522 | 0x0 0x0 0x0 |
||
523 | 56 0x0 0xB8 0 0 0 0x0 (4 Kbytes) |
||
524 | 0x0 0x0 uncached |
||
525 | 0x0 0x0 0x0 |
||
526 | 57 0x0 0xB9 0 0 0 0x0 (4 Kbytes) |
||
527 | 0x0 0x0 uncached |
||
528 | 0x0 0x0 0x0 |
||
529 | 58 0x0 0xBA 0 0 0 0x0 (4 Kbytes) |
||
530 | 0x0 0x0 uncached |
||
531 | 0x0 0x0 0x0 |
||
532 | 59 0x0 0xBB 0 0 0 0x0 (4 Kbytes) |
||
533 | 0x0 0x0 uncached |
||
534 | 0x0 0x0 0x0 |
||
535 | 60 0x0 0xBC 0 0 0 0x0 (4 Kbytes) |
||
536 | 0x0 0x0 uncached |
||
537 | 0x0 0x0 0x0 |
||
538 | 61 0x0 0xBD 0 0 0 0x0 (4 Kbytes) |
||
539 | 0x0 0x0 uncached |
||
540 | 0x0 0x0 0x0 |
||
541 | 62 0x0 0xBE 0 0 0 0x0 (4 Kbytes) |
||
542 | 0x0 0x0 uncached |
||
543 | 0x0 0x0 0x0 |
||
544 | 63 0x0 0xBF 0 0 0 0x0 (4 Kbytes) |
||
545 | 0x0 0x0 uncached |
||
546 | 0x0 0x0 0x0 |
||
547 | |||
548 | |||
549 | RTC chip is DS1337 |
||
550 | </pre> |